Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.

Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.

Abstract: A plan layout on a semiconductor substrate has a distribution of threshold voltages for switching. In a case where a histogram is defined by a plurality of bins each having a bin width of 100 mV for the threshold voltages and a plurality of frequencies corresponding to areas in the plan layout belonging to the respective bins, the plan layout includes a plurality of regions belonging to different bins of the plurality of bins. The plurality of regions include first to third regions. The histogram has, based on a normal distribution, a distribution tailed on a low voltage side contiguously with the normal distribution.

Abstract: Provided is a semiconductor device and a method of manufacturing a semiconductor device in which deterioration of energy loss is suppressed. The semiconductor device includes: a drift layer of a first conductivity type provided between a first main surface and a second main surface of a semiconductor substrate; and a field stop layer of the first conductivity type having an impurity concentration higher than that of the drift layer and provided between the drift layer and the second main surface. A net carrier concentration profile at room temperature of the field stop layer have at least one peak from the second main surface toward the first main surface. A hydrogen atom concentration profile of the field stop layer have at least two peaks from the second main surface toward the first main surface. The hydrogen atom concentration profile has more peaks than the net carrier concentration profile.

Abstract: A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.

Abstract: A first buffer layer includes: a first region containing protons and in contact with a drift layer; a second region between the first region and a first principal surface containing protons, and in contact with the first region; and a third region between the second region of the first buffer layer and the first principal surface. An impurity concentration profile of the first buffer layer includes: a maximum value in the second region; a kink at a boundary point between the first region and the second region, relaxing or stopping a decrease from the maximum value; a value at the boundary point higher than or equal to 80% of the maximum value; and a distribution of the third region longer than or equal to 5 ?m and having an impurity concentration lower than the value at the boundary point and lower than or equal to 5.0×1014/cm3.

Abstract: A drift layer is made of silicon carbide and has a first conductivity type. At least one trench has a first side surface facing a Schottky barrier diode region, and a second side surface extending in a transistor region and contacting a source region, a body region, and the drift layer. A first protective region is provided under the at least one trench, has a second conductivity type, and is higher in impurity concentration of the second conductivity type than the body region. A second protective region extends from the first protective region, reaches at least one of the first side surface and an end region of the second side surface continuous with the first side surface, has an uppermost portion shallower than a lowermost portion of the body region, and is higher in impurity concentration of the second conductivity type than the body region.

Abstract: A semiconductor device includes a drift region that is of first conductive type and formed in a semiconductor substrate; a hydrogen buffer region that is of first conductive type, positioned on the back surface side of the drift region, contains hydrogen as impurities, and has impurity concentration higher than impurity concentration of the drift region; a flat region that is of first conductive type, positioned on the back surface side of the hydrogen buffer region, and has impurity concentration higher than impurity concentration of the drift region; and a carrier injection layer that is of first or second conductive type, positioned on the back surface side of the flat region, and has impurity concentration higher than impurity concentrations of the hydrogen buffer region and the flat region. The hydrogen buffer region and the flat region each have a constant oxygen concentration of 1E16 atoms/cm3 to 6E17 atoms/cm3 inclusive.

Abstract: A non-limiting example game system includes a main body apparatus, and this main body apparatus is provided attachably and detachably with a left controller and a right controller. In a first operation mode, a movement and an action of a player character are controlled according to an operation of a player. In a second operation mode, an offensive character is made to appear, and a movement and an action of the offensive character are controlled according to an operation of the player. Therefore, the movement of the player character is restricted in the second operation mode. A direction and a position of a virtual camera are controlled so as to follow the player character in the first operation mode and to respectively capture the player character and the offensive character in the second operation mode.

Abstract: A non-limiting example game system includes a main body apparatus, and this main body apparatus is provided attachably and detachably with a left controller and a right controller. In a first operation mode, a movement and an action of a player character are controlled according to an operation of a player. In a second operation mode, an offensive character is made to appear, and a movement and an action of the offensive character are controlled according to an operation of the player. Therefore, the movement of the player character is restricted in the second operation mode. A direction and a position of a virtual camera are controlled so as to follow the player character in the first operation mode and to respectively capture the player character and the offensive character in the second operation mode.

Abstract: A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.

Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.

Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.

Abstract: A drift layer made of silicon carbide has a first conductivity type. A body region on the drift layer has a second conductivity type. A source region on the body region has the first conductivity type. A gate insulating film is on each inner wall of at least one trench. A protective layer has at least a portion below the trench, is in contact with the drift layer, and has the second conductivity type. A first low-resistance layer is in contact with the trench and the protective layer, straddles a border between the trench and the protective layer in the depth direction, has the first conductivity type, and has a higher impurity concentration than the drift layer. A second low-resistance layer is in contact with the first low-resistance layer, is away from the trench, has the first conductivity type, and has a higher impurity concentration than the first low-resistance layer.

Abstract: A drift layer is made of silicon carbide and has a first conductivity type. At least one trench has a first side surface facing a Schottky barrier diode region, and a second side surface extending in a transistor region and contacting a source region, a body region, and the drift layer. A first protective region is provided under the at least one trench, has a second conductivity type, and is higher in impurity concentration of the second conductivity type than the body region. A second protective region extends from the first protective region, reaches at least one of the first side surface and an end region of the second side surface continuous with the first side surface, has an uppermost portion shallower than a lowermost portion of the body region, and is higher in impurity concentration of the second conductivity type than the body region.

Abstract: The present invention relates to a semiconductor device having trench gates. The semiconductor device includes the following: a first semiconductor layer; a first semiconductor region selectively disposed in the upper layer of the first semiconductor layer; a second semiconductor region in contact with the first semiconductor region; a third semiconductor region on the bottom surfaces of the first and second semiconductor regions; gate trenches provided to penetrate the first and third semiconductor regions in the thickness direction of the first and third semiconductor regions to reach the inside of the first semiconductor layer; a field-reducing region on the bottom of each gate trench; and connection layers arranged in the first semiconductor layer at intervals so as to be each in contact with at least one of sidewalls of the gate trenches, the connection layers each electrically connecting the field-reducing region to the third semiconductor region.

Abstract: A drift layer made of silicon carbide has a first conductivity type. A body region on the drift layer has a second conductivity type. A source region on the body region has the first conductivity type. A gate insulating film is on each inner wall of at least one trench. A protective layer has at least a portion below the trench, is in contact with the drift layer, and has the second conductivity type. A first low-resistance layer is in contact with the trench and the protective layer, straddles a border between the trench and the protective layer in the depth direction, has the first conductivity type, and has a higher impurity concentration than the drift layer. A second low-resistance layer is in contact with the first low-resistance layer, is away from the trench, has the first conductivity type, and has a higher impurity concentration than the first low-resistance layer.

Abstract: [Summary] [Object] An object of the present invention is to enhance operability of a mobile communication terminal to be foldable by directing a display panel outward.

Abstract: The present invention provides a mobile phone that includes a single camera for picking up a 2D image and provides the 2D image with parallax information to create a 3D image. The 3D image is displayed on a display unit.

Abstract: [Summary] [Object] An object of the present invention is to enhance operability of a mobile communication terminal to be foldable by directing a display panel outward.