Abstract: The eyeglass retainer comprises a pair of elastic tubes, to each of those which each of the temples of eyeglasses is forcibly inserted, a pair of wire members each connected to the corresponding elastic tube, and a pair of piece members each fixed to the corresponding end of the wire member; wherein each of the wire members is slidably inserted through the corresponding piece member at the middle position of the wire member with intervention of given sliding frictional force, the tubes made of elastic synthetic resin, through those which the wire members are slidably inserted with intervention of given frictional force, are embedded inside the piece members, respectively, and the wire members and the tubes made of elastic synthetic resin are interactively configured such that the tensile force to be generated when pulling the pair of piece members adapted to slide against the wire members.

Abstract: Providing a CDR circuit having a stable clock extracting function and a data regenerating function with a high-speed data input process by reducing the operation speed of the phase comparator circuit. With a phase comparator circuit capable of operating with a clock signal whose period is 2 times the unit time width of the inputted data signal, the pulse width of the phase error signal, representing the difference in phase between the transition point of the data signal and the transition point of the clock signal, is extended as much as the unit time width of the data signal.

Abstract: A phase comparator comprises a latch unit for latching the input data signal in parallel on rising/falling edges of the respective clock signals respectively, an error signal output unit for outputting m error signals respectively indicative of differences in phase between the transient edge of the input data signal and the transient edges of the respective clock signals and each having a minimum pulse width of (m/2?1)×T or more, based on respective output signals produced from the latch unit and the respective clock signals, an input unit for inputting the respective output signals produced from the latch unit in parallel on the rising/falling edges of the respective clock signals and a reference signal output unit for outputting m reference signals whose pulse widths are (m/2)×T, based on output signals produced from the input unit and the respective clock signals.

Abstract: Providing a CDR circuit having a stable clock extracting function and a data regenerating function with a high-speed data input process by reducing the operation speed of the phase comparator circuit. With a phase comparator circuit capable of operating with a clock signal whose period is 2 times the unit time width of the inputted data signal, the pulse width of the phase error signal, representing the difference in phase between the transition point of the data signal and the transition point of the clock signal, is extended as much as the unit time width of the data signal.

Abstract: A phase comparator comprises a latch unit for latching the input data signal in parallel on rising/falling edges of the respective clock signals respectively, an error signal output unit for outputting m error signals respectively indicative of differences in phase between the transient edge of the input data signal and the transient edges of the respective clock signals and each having a minimum pulse width of (m/2−1)×T or more, based on respective output signals produced from the latch unit and the respective clock signals, an input unit for inputting the respective output signals produced from the latch unit in parallel on the rising/falling edges of the respective clock signals and a reference signal output unit for outputting m reference signals whose pulse widths are (m/2)×T, based on output signals produced from the input unit and the respective clock signals.

Abstract: A semiconductor photodetector includes a SOI substrate; a p-i-n photodiode provided on the SOI substrate, the p-i-n photodiode having an i-type semiconductor region; an insulator film provided on the i-type semiconductor region; and a depleting electrode provided on the insulator film. The semiconductor photodetector exhibits its function well with or without a power source for applying a voltage to the depleting electrode for depleting it. When the power source for depletion is used, the function of the device is realized at a voltage for depletion applied from the power source for depletion lower than a biasing voltage applied from a biasing power source.

Abstract: A surge protection circuit including a first MOSFET and a second MOSFET connected in series. The drain of the first MOSFET is connected to the input terminal and the source of the second MOSFET is grounded. The gate of the second MOSFET is grounded, whereas the gate of the first MOSFET is connected to a high potential power supply terminal. This makes it possible to equalize the voltages applied to the two MOSFETs constituting the surge protection circuit, and weakens the intensity of the internal electric field of respective MOSFETs, thereby prolonging the lifetime of the surge protection circuit. The surge protection circuit is particularly effective in a SOI LSI.