Patents by Inventor Yusuke OTSUKA

Yusuke OTSUKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9420481
    Abstract: Provided is a mobile communication terminal test system that transmits a test signal formed by a plurality of downlink component carriers including a primary component carrier (DL_CC1) and a secondary component carrier (DL_CC2) to a mobile communication terminal to test the mobile communication terminal. The mobile communication terminal test system includes a primary test device that transmits first communication data including first test data to the mobile communication terminal using the primary component carrier of the test signal and a secondary test device that transmits second communication data including second test data to the mobile communication terminal using the secondary component carrier of the test signal.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: August 16, 2016
    Assignee: ANRITSU CORPORATION
    Inventors: Takayuki Awano, Yusuke Otsuka
  • Publication number: 20150043356
    Abstract: Provided is a mobile communication terminal test system that transmits a test signal formed by a plurality of downlink component carriers including a primary component carrier (DL_CC1) and a secondary component carrier (DL_CC2) to a mobile communication terminal to test the mobile communication terminal. The mobile communication terminal test system includes a primary test device that transmits first communication data including first test data to the mobile communication terminal using the primary component carrier of the test signal and a secondary test device that transmits second communication data including second test data to the mobile communication terminal using the secondary component carrier of the test signal.
    Type: Application
    Filed: July 10, 2014
    Publication date: February 12, 2015
    Inventors: Takayuki Awano, Yusuke Otsuka
  • Patent number: 8754742
    Abstract: A multilayer ceramic substrate includes a ceramic laminated body including a plurality of ceramic layers stacked on each other, a resistor, and a resistor connecting conductor with a portion overlapping the resistor and an overcoat layer that covers the resistor located on a principal surface of the ceramic laminated body. An overcoat layer is made relatively thick during firing, thereby making cracks less likely to be caused, and after the firing step, the thickness of the overcoat layer is reduced by physically scraping down the surface of the overcoat layer, thereby reducing the trimming time. In the overcoat layer, a region that covers a portion in which a resistor overlaps a resistor connecting conductor is thicker than a region that covers the other portion.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: June 17, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yusuke Otsuka, Yuichi Iida, Kazuo Kishida, Takahiro Takada
  • Publication number: 20140041912
    Abstract: A high-quality resistor pattern and conductor pattern is formed on an external surface of a multilayer ceramic substrate by an ink jet method. A composite sheet including a first ceramic green layer and a shrinkage-retardant layer is formed, and a resistor pattern and a conductor pattern are formed on the first ceramic green layer of the composite sheet by an ink jet method. Subsequently, a plurality of second ceramic green layers are stacked with the composite sheet such that the shrinkage-retardant layer of the composite sheet defines an outermost layer, thus forming a multilayer composite including an unfired multilayer ceramic substrate and the shrinkage-retardant layer. Then, the multilayer composite is fired, and the shrinkage-retardant layer is removed to obtain a sintered multilayer ceramic substrate.
    Type: Application
    Filed: October 16, 2013
    Publication date: February 13, 2014
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yusuke OTSUKA, Kazuo KISHIDA, Takahiro TAKADA
  • Patent number: 8585842
    Abstract: A high-quality resistor pattern and conductor pattern is formed on an external surface of a multilayer ceramic substrate by an ink jet method. A composite sheet including a first ceramic green layer and a shrinkage-retardant layer is formed, and a resistor pattern and a conductor pattern are formed on the first ceramic green layer of the composite sheet by an ink jet method. Subsequently, a plurality of second ceramic green layers are stacked with the composite sheet such that the shrinkage-retardant layer of the composite sheet defines an outermost layer, thus forming a multilayer composite including an unfired multilayer ceramic substrate and the shrinkage-retardant layer. Then, the multilayer composite is fired, and the shrinkage-retardant layer is removed to obtain a sintered multilayer ceramic substrate.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: November 19, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yusuke Otsuka, Kazuo Kishida, Takahiro Takada
  • Patent number: 8491834
    Abstract: A laminate type ceramic electronic component includes a thick film resistor and an overcoat layer so as to prevent defects such as delamination from being caused and to prevent the thick film resistor from being cracked after laser trimming, even when a method is adopted in which an unfired composite laminate is subjected to firing in such a way that an unfired ceramic laminate, an unfired thick film resistor, and an unfired overcoat layer are each integrally sintered. The unfired overcoat layer includes a glass ceramic material containing a ceramic and glass having substantially the same constituents and compositional ratio as those of the glass contained in the unfired ceramic layer.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: July 23, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yuichi Iida, Yusuke Otsuka
  • Publication number: 20110266036
    Abstract: A laminate type ceramic electronic component includes a thick film resistor and an overcoat layer so as to prevent defects such as delamination from being caused and to prevent the thick film resistor from being cracked after laser trimming, even when a method is adopted in which an unfired composite laminate is subjected to firing in such a way that an unfired ceramic laminate, an unfired thick film resistor, and an unfired overcoat layer are each integrally sintered. The unfired overcoat layer includes a glass ceramic material containing a ceramic and glass having substantially the same constituents and compositional ratio as those of the glass contained in the unfired ceramic layer.
    Type: Application
    Filed: July 13, 2011
    Publication date: November 3, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuichi IIDA, Yusuke OTSUKA
  • Publication number: 20100059252
    Abstract: A high-quality resistor pattern and conductor pattern is formed on an external surface of a multilayer ceramic substrate by an ink jet method. A composite sheet including a first ceramic green layer and a shrinkage-retardant layer is formed, and a resistor pattern and a conductor pattern are formed on the first ceramic green layer of the composite sheet by an ink jet method. Subsequently, a plurality of second ceramic green layers are stacked with the composite sheet such that the shrinkage-retardant layer of the composite sheet defines an outermost layer, thus forming a multilayer composite including an unfired multilayer ceramic substrate and the shrinkage-retardant layer. Then, the multilayer composite is fired, and the shrinkage-retardant layer is removed to obtain a sintered multilayer ceramic substrate.
    Type: Application
    Filed: November 19, 2009
    Publication date: March 11, 2010
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yusuke OTSUKA, Kazuo KISHIDA, Takahiro TAKADA