Patents by Inventor Yusuke Uemichi

Yusuke Uemichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12107310
    Abstract: A mode converter which converts between a mode of a post-wall waveguide and a mode of a line in which a strip-shaped conductor is formed on another substrate different from a substrate of the post-wall waveguide, is less likely to cause a transmission failure resulting from a change in environmental temperature. A mode converter (10) includes: a post-wall waveguide (PW) in which an opening (121) is provided in a wide wall (conductor layer 12); a dielectric substrate (15) having a main surface on which a strip-shaped conductor (16) is formed; and a joining member (solder 18) joining the wide wall (conductor layer 12) and the substrate (15), wherein in a plan view, the opening (121) and the strip-shaped conductor (16) overlap each other.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: October 1, 2024
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Publication number: 20240304968
    Abstract: A digital phase shifter of the present invention is a digital phase shifter in which digital phase shift circuits are cascade-connected, each of the digital phase shift circuits including a signal line, a pair of inner lines provided on both sides of the signal line, a pair of outer lines provided on outer sides of the inner lines, a first ground conductor connected to one ends of the inner lines and one ends of the outer lines, a second ground conductor connected to the other ends of the outer lines, and a pair of electronic switches provided between the other ends of the inner lines and the second ground conductors.
    Type: Application
    Filed: August 8, 2022
    Publication date: September 12, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Patent number: 12087991
    Abstract: An aspect of the present invention reduces loss that may occur in cases where electromagnetic waves are guided from one main surface side of a substrate to the other main surface side of the substrate. A waveguide device (10, 10A, 20) includes: a substrate (11); a first conductor layer (12A) and a second conductor layer (12B) which are provided on both main surfaces of the substrate, respectively; a main conductor post (MP) which penetrates between the both main surfaces; and one or more sub-conductor posts (SP) which penetrate between the both main surfaces and which, together with the main conductor post, guide a TEM mode or a quasi-TEM mode.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: September 10, 2024
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Publication number: 20240275010
    Abstract: A digital phase shift circuit includes a signal line extending in a predetermined direction, two inner lines arranged to be separated from the signal line by a predetermined distance at both one side and the other side of the signal line, two outer lines provided at positions farther from the signal line than the inner lines at both the one side and the other side of the signal line, a first ground conductor electrically connected to one ends of the inner lines and the outer lines in the predetermined direction, and a second ground conductor electrically connected to the other ends of the outer lines in the predetermined direction. On both or one of the first ground conductor and the second ground conductor, a region between the outer line and the inner line is formed in a multilayer structure.
    Type: Application
    Filed: August 8, 2022
    Publication date: August 15, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20240258998
    Abstract: A digital phase shift circuit includes: a signal line that extends in a predetermined direction; a first inner line that is separated from a first side of the signal line; a second inner line that is separated from a second side of the signal line; an outer line that is provided at a position which is farther from the signal line than the first inner line or the second inner line on a first side or a second side; a first grounding conductor that is provided at each of first ends of the first inner line, the second inner line, and the outer line; a second grounding conductor that is provided at a second end of the outer line; a first electronic switch that is provided between a second end of the first inner line and the second grounding conductor; and a second electronic switch that is provided between a second end of the second inner line and the second grounding conductor.
    Type: Application
    Filed: August 18, 2022
    Publication date: August 1, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20240258669
    Abstract: A digital phase shifter includes a plurality of digital phase shift circuits connected in cascade and one or more bend-type connection units each configured to make a connection between two digital phase shift circuits of the plurality of digital phase shift circuits. Each of the digital phase shift circuits includes at least a signal line, a pair of inner lines provided at both sides of the signal line, a pair of outer lines provided outside of the inner lines, a first ground conductor connected to one ends of the inner lines and the outer lines, a second ground conductor connected to the other ends of the outer lines, and a pair of electronic switches provided between the other ends of the inner lines and the second ground conductor. Each of the digital phase shift circuits is a circuit set in a low-delay mode in which a return current flows through the inner line or a high-delay mode in which a return current flows through the outer line.
    Type: Application
    Filed: August 8, 2022
    Publication date: August 1, 2024
    Applicant: Fujikura Ltd.
    Inventors: Yusuke Uemichi, Yo Yamaguchi
  • Publication number: 20240258997
    Abstract: A digital phase shifter in which a plurality of digital phase shift circuits are connected in cascade. One of the digital phase shift circuits includes at least a signal line, a pair of inner lines provided at both sides of the signal line, a pair of outer lines provided outside of the pair of inner lines, a first ground conductor connected to each first ends of the pair of inner lines and the pair of outer lines, a second ground conductor connected to each second ends of the pair of outer lines, and a pair of electronic switches provided between each of the second ends of the pair of inner lines and the second ground conductor. The pair of outer lines adjacent to each other are separated between the digital phase shift circuits adjacent to each other and the first ground conductor and the second ground conductor adjacent to each other are separated between the digital phase shift circuits adjacent to each other.
    Type: Application
    Filed: August 9, 2022
    Publication date: August 1, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20240258670
    Abstract: A digital phase shift circuit includes: a signal line extending in a predetermined direction; two inner lines disposed on both one side and another side of the signal line and separated a predetermined distance from the signal line; two outer lines provided at positions which are farther from the signal line than the inner lines on both the one side and the other side; a first grounding conductor electrically connected to one end of each of the inner lines and the outer lines; and a second grounding conductor electrically connected to other ends of the outer lines, and the predetermined distance is set to be less than 10 ?m.
    Type: Application
    Filed: August 10, 2022
    Publication date: August 1, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Patent number: 12052007
    Abstract: A digital phase shifter in which a plurality of digital phase shift circuits are connected in cascade. One of the digital phase shift circuits includes at least a signal line, a pair of inner lines provided at both sides of the signal line, a pair of outer lines provided outside of the pair of inner lines, a first ground conductor connected to each first ends of the pair of inner lines and the pair of outer lines, a second ground conductor connected to each second ends of the pair of outer lines, and a pair of electronic switches provided between each of the second ends of the pair of inner lines and the second ground conductor. The pair of outer lines adjacent to each other are separated between the digital phase shift circuits adjacent to each other and the first ground conductor and the second ground conductor adjacent to each other are separated between the digital phase shift circuits adjacent to each other.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: July 30, 2024
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Publication number: 20240250665
    Abstract: A digital phase shifter includes: a plurality of digital phase shift circuits connected in a cascade manner, wherein each of the plurality of digital phase shift circuits includes a signal line, two inner lines provided on two sides of the signal line, two outer lines provided on outer sides of the inner lines, a first grounding conductor connected to one end of each of the inner lines and the outer lines, a second grounding conductor connected to other ends of the outer lines, and two electronic switches provided between other ends of the inner lines and the second grounding conductor, and is set to a low-delay mode in which return currents flow in the inner lines or a high-delay mode in which return currents flow in the outer lines, and wherein the digital phase shifter includes: a phase shift quantity moderator that moderates unevenness of a phase shift quantity of an uneven digital phase shift circuit of the plurality of digital phase shift circuits, of which the phase shift quantity is uneven with respec
    Type: Application
    Filed: August 5, 2022
    Publication date: July 25, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Patent number: 12040765
    Abstract: A digital phase shifter includes: a plurality of digital phase shift circuits connected in a cascade manner, wherein each of the plurality of digital phase shift circuits includes a signal line, two inner lines provided on two sides of the signal line, two outer lines provided on outer sides of the inner lines, a first grounding conductor connected to one end of each of the inner lines and the outer lines, a second grounding conductor connected to other ends of the outer lines, and two electronic switches provided between other ends of the inner lines and the second grounding conductor, and is set to a low-delay mode in which return currents flow in the inner lines or a high-delay mode in which return currents flow in the outer lines, and wherein the digital phase shifter includes: a phase shift quantity moderator that moderates unevenness of a phase shift quantity of an uneven digital phase shift circuit of the plurality of digital phase shift circuits, of which the phase shift quantity is uneven with respec
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: July 16, 2024
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Publication number: 20240222829
    Abstract: A digital phase shifter of the present invention is a digital phase shifter in which digital phase shift circuits are cascade-connected, each of the digital phase shift circuits including a signal line, a pair of inner lines provided on both sides of the signal line, a pair of outer lines provided on outer sides of the inner lines, a first ground conductor connected to one ends of the inner lines and one ends of the outer lines, a second ground conductor connected to the other ends of the outer lines, and a pair of electronic switches provided between the other ends of the inner lines and the second ground conductor. The digital phase shift circuits include a multi-row structure constituted by a front row and a rear row, the front row and the rear row are adjacent to each other, and the ground pattern is connected to the front row at one point.
    Type: Application
    Filed: August 8, 2022
    Publication date: July 4, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20240222830
    Abstract: A connecting portion includes a first connection line configured to connect a signal line of a first digital phase shift circuit and a signal line of a second digital phase shift circuit, second connection lines configured to connect inner lines of the first digital phase shift circuit and inner lines of the second digital phase shift circuit, ground layers disposed above and below the first connection line and the second connection lines, and first via holes configured to connect at least the second connection lines and the ground layers.
    Type: Application
    Filed: August 8, 2022
    Publication date: July 4, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20240222837
    Abstract: A splitter-combiner includes a first quarter-wave line, a second quarter-wave line, an absorption resistance, a combining terminal, and a line bending circuit. The line bending circuit includes a line parallel region and a line bending region. The line parallel region has the first quarter-wave line and the second quarter-wave line. The first quarter-wave line and the second quarter-wave line are parallel to each other in the line parallel region. The line bending region has the first quarter-wave line and the second quarter-wave line. The first quarter-wave line and the second quarter-wave line are bent in the same direction as each other in the line bending region.
    Type: Application
    Filed: February 9, 2022
    Publication date: July 4, 2024
    Applicants: Fujikura Ltd., International Business Machines Corporation
    Inventors: Yusuke Uemichi, Bodhisatwa Sadhu, Jean-Olivier Plouchart
  • Patent number: 12015387
    Abstract: A digital phase shifter includes a plurality of digital phase shift circuit groups in which a plurality of digital phase shift circuits are connected in cascade and one or more bend-type connection units connected between two digital phase shift circuit groups. At least one of the digital phase shift circuits constituting at least one digital phase circuit group is a mitigation circuit that mitigates a distribution of phase shift amounts.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: June 18, 2024
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Patent number: 11888203
    Abstract: A filter device having desired characteristics is easily designed. The filter device includes a post-wall waveguide functioning as a resonator group including five congruent resonators (R1 to R5). The resonators (R1, R2) include therein respective control posts (CP1, CP2), and a shortest distance (di) from the control post (CPi) to a narrow wall of the resonator (Ri) satisfies d1>d2. The resonators (R4, R5) include therein respective control posts (CP4, CP5), and a shortest distance (dj) from the control post (CPj) to a narrow wall of the resonator (Rj) satisfies d4<d5.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: January 30, 2024
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Publication number: 20240030574
    Abstract: The power splitter-combiner (1) includes one combining terminal (11), two split terminals (12a, 12b), an absorption resistance (13) connected between the two split terminals, a first transmission line (14a) connected between the combining terminal and one split terminal of the two split terminals, a second transmission line (14b) connected between the combining terminal and the other split terminal of the two split terminals and having a length shorter than that of the first transmission line, and at least one first open stub (15) connected to the second transmission line.
    Type: Application
    Filed: May 31, 2021
    Publication date: January 25, 2024
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20230420815
    Abstract: A digital phase shifter includes a plurality of digital phase shift circuit groups in which a plurality of digital phase shift circuits are connected in cascade, one or more relay digital phase shift circuits (digital phase shift circuits) provided between two digital phase shift circuit groups, and two or more bend-type connection units configured to connect one of the two digital phase shift circuit group and the relay digital phase shift circuit and connect the other of the two digital phase shift circuit groups and the relay digital phase shift circuit. At least one of the digital phase shift circuits constituting at least one digital phase shift circuit group and the relay digital phase shift circuit is a mitigation circuit that mitigates the distribution of phase shift amounts.
    Type: Application
    Filed: January 25, 2023
    Publication date: December 28, 2023
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Publication number: 20230421138
    Abstract: A digital phase shifter includes a plurality of digital phase shift circuit groups in which a plurality of digital phase shift circuits are connected in cascade and one or more bend-type connection units connected between two digital phase shift circuit groups. At least one of the digital phase shift circuits constituting at least one digital phase circuit group is a mitigation circuit that mitigates a distribution of phase shift amounts.
    Type: Application
    Filed: January 26, 2023
    Publication date: December 28, 2023
    Applicant: Fujikura Ltd.
    Inventor: Yusuke Uemichi
  • Patent number: 11843157
    Abstract: An aspect of the present invention is to reduce return loss in a mode converter. A mode converter (10) includes an excitation pin (through via TV) configured to carry out mutual conversion between a waveguide mode of a post-wall waveguide (PW) and a waveguide mode of a microstrip line (MS). The mode conductor includes a pair of wide walls (conductor layers 12 and 13), in which first and second anti-pads (anti-pads 12c, 13c) are formed, respectively. The first and second anti-pads each have an inner edge including the excitation pin and each have an outer size (diameter D12) that is more than 5 times and less than 6 times as large as the diameter (DT) of the excitation pin.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: December 12, 2023
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi