Patents by Inventor Yusuke Uesaka
Yusuke Uesaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12255215Abstract: An imaging element is provided with a plurality of pixels, a separation region, and a non-separation region. Each of the plurality of pixels is provided with a polarization unit that polarizes incident light in a specific polarization direction and a photoelectric conversion unit that is formed in a semiconductor substrate and performs photoelectric conversion of the polarized incident light. The separation region is arranged in the semiconductor substrate and separates the plurality of pixels from each other. The non-separation region includes the semiconductor substrate and is arranged in a clearance formed in the separation region in the vicinity of a corner of each of the plurality of pixels.Type: GrantFiled: July 16, 2020Date of Patent: March 18, 2025Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kazuki Sakoda, Yusuke Uesaka, Susumu Inoue
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Publication number: 20240313030Abstract: A first light-receiving element of an embodiment of the disclosure includes: a semiconductor substrate including a photoelectric conversion region; a first first electrically-conductive region provided at a first surface interface of the semiconductor substrate and coupled to a first electrode; a second first electrically-conductive region provided around the first first electrically-conductive region and coupled to a second electrode, at the first surface interface; a third first electrically-conductive region in an electrically floating state provided around the second first electrically-conductive region, at the first surface interface; a first second electrically-conductive region having a different electrically-conductive type between the first first electrically-conductive region and the second first electrically-conductive region, at the first surface interface; and a fourth first electrically-conductive region provided at least between the first first electrically conductive region and the first seconType: ApplicationFiled: March 25, 2022Publication date: September 19, 2024Applicants: SONY SEMICONDUCTOR SOLUTIONS CORPORATION, RIKENInventors: Takahiro KAWAMURA, Hiroki TOJINBARA, Takaki HATSUI, Shinichi YOSHIDA, Keiichi NAKAZAWA, Hikaru IWATA, Kazunobu OTA, Takuya MARUYAMA, Hiroaki ISHIWATA, Chihiro ARAI, Atsuhiro ANDO, Toru SHIRAKATA, Hisahiro ANSAI, Satoe MIYATA, Ryu KAMIBABA, Yusuke UESAKA, Yukari TAKEYA
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Publication number: 20230230986Abstract: A solid-state imaging element according to the present disclosure includes a first light receiving pixel, a second light receiving pixel, and a metal layer. The first light receiving pixel receives visible light. The second light receiving pixel receives infrared light. The metal layer is provided to face at least one of a photoelectric conversion unit of the first light receiving pixel and a photoelectric conversion unit of the second light receiving pixel on an opposite side of a light incident side, and contains tungsten as a main component.Type: ApplicationFiled: April 14, 2021Publication date: July 20, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yoshiaki MASUDA, Kazuyoshi YAMASHITA, Shinichiro KURIHARA, Syogo KUROGI, Yusuke UESAKA, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI, Shinta KOBAYASHI, Chihiro ARAI
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Publication number: 20230215901Abstract: A solid-state imaging element that includes a semiconductor layer, a floating diffusion region (FD), a penetrating pixel separation region, and a non-penetrating pixel separation region. In the semiconductor layer, a visible-light pixel (PDc) that receives visible light and an infrared-light pixel (PDw) that receives infrared light are two-dimensionally arranged. The floating diffusion region is provided in the semiconductor layer and is shared by adjacent visible-light and infrared-light pixels. The penetrating pixel separation region is provided in a region excluding a region corresponding to the floating diffusion region in an inter-pixel region of the visible-light pixel and the infrared-light pixel, and penetrates the semiconductor layer in a depth direction.Type: ApplicationFiled: April 12, 2021Publication date: July 6, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kazuyoshi YAMASHITA, Yoshiaki MASUDA, Shinichiro KURIHARA, Syogo KUROGI, Yusuke UESAKA, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI
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Publication number: 20230197748Abstract: The solid-state imaging element includes a plurality of first light receiving pixels that receives visible light, a plurality of second light receiving pixels that receives infrared light, a separation region, and a light shielding wall. The plurality of first light receiving pixels and the plurality of second light receiving pixels are arranged in a matrix, and the separation regionis arranged in a lattice pattern, light and has a plurality of intersection portions The light shielding wall is provided in the separation region and includes a first light shielding wall provided along a first direction in plan view, and a second light shielding wall provided along a second direction intersecting the first direction in plan view. In addition, the first light shielding wall and the second light shielding wall are spaced apart at the intersection portionof at least a part of the separation region.Type: ApplicationFiled: April 13, 2021Publication date: June 22, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Yusuke UESAKA, Kazuyoshi YAMASHITA, Yoshiaki MASUDA, Shinichiro KURIHARA, Syogo KUROGI, Toshiki SAKAMOTO, Hiroyuki KAWANO, Masatoshi IWAMOTO, Takashi TERADA, Sintaro NAKAJIKI
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Patent number: 11621284Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.Type: GrantFiled: April 24, 2018Date of Patent: April 4, 2023Assignee: SONY CORPORATIONInventors: Yusuke Uesaka, Atsuhiko Yamamoto
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Publication number: 20230063356Abstract: There is provided a biological substance detection chip having high detection accuracy. The present technology provides a biological substance detection chip which is composed of a plurality of pixels, in which the pixel includes a holding surface on which a biological substance is held, a photoelectric conversion unit that is provided below the holding surface and provided on a semiconductor substrate, and a wiring layer that is provided below the photoelectric conversion unit.Type: ApplicationFiled: January 29, 2021Publication date: March 2, 2023Inventors: HARUMI TANAKA, YOSHIAKI MASUDA, YUSUKE UESAKA, TAKAFUMI MORIKAWA
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Publication number: 20220336512Abstract: To reduce crosstalk between adjacent pixels in an imaging element that acquires polarization information of a subject. The imaging element is provided with a plurality of pixels, a separation region, and a non-separation region. Each of the plurality of pixels is provided with a polarization unit that polarizes incident light in a specific polarization direction and a photoelectric conversion unit that is formed in a semiconductor substrate and performs photoelectric conversion of the polarized incident light. The separation region is arranged in the semiconductor substrate and separates the plurality of pixels from each other. The non-separation region includes the semiconductor substrate in the clearance formed in the separation region in the vicinity of the corner of the pixel.Type: ApplicationFiled: July 16, 2020Publication date: October 20, 2022Inventors: KAZUKI SAKODA, YUSUKE UESAKA, SUSUMU INOUE
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Patent number: 11089246Abstract: Accuracy in obtaining polarization information can be improved in a solid-state imaging device including a polarization pixel. There is provided a solid-state imaging device including a plurality of polarization pixels that obtains a polarization signal of incident light, a semiconductor substrate on which the plurality of polarization pixels is arranged, and a circuit layer provided on a surface facing a surface of the semiconductor substrate on which the incident light is made incident, the circuit layer including a polarization pixel circuit that performs signal processing on the polarization signal obtained by the polarization pixels, in which a blank area that separates the plurality of polarization pixels from each other is provided over the entire circumference of the plurality of polarization pixels.Type: GrantFiled: August 20, 2018Date of Patent: August 10, 2021Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Yusuke Uesaka
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Publication number: 20200322551Abstract: Accuracy in obtaining polarization information can be improved in a solid-state imaging device including a polarization pixel. There is provided a solid-state imaging device including a plurality of polarization pixels that obtains a polarization signal of incident light, a semiconductor substrate on which the plurality of polarization pixels is arranged, and a circuit layer provided on a surface facing a surface of the semiconductor substrate on which the incident light is made incident, the circuit layer including a polarization pixel circuit that performs signal processing on the polarization signal obtained by the polarization pixels, in which a blank area that separates the plurality of polarization pixels from each other is provided over the entire circumference of the plurality of polarization pixels.Type: ApplicationFiled: August 20, 2018Publication date: October 8, 2020Inventor: YUSUKE UESAKA
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Patent number: 10559616Abstract: The present technology relates to a solid-state imaging apparatus and an electronic device that are configured to enhance the accuracy in the detection of polarization information. The solid-state imaging apparatus has a pixel array block on which pixels each including a photoelectric conversion device are arranged; a polarizer, including a conductive light-shielding material, that covers a photosensitive surface of the above-mentioned photoelectric conversion device of at least part of the above-mentioned pixels; a light-shielding film, including a conductive light-shielding material, that is arranged between the above-mentioned adjacent pixels on the photosensitive surface side of the above-mentioned photoelectric conversion device; and a wiring layer arranged on a side opposite to the photosensitive surface of the above-mentioned photoelectric conversion device, in which the above-mentioned polarizer is connected to a wiring of the above-mentioned wiring layer via the above-mentioned light-shielding film.Type: GrantFiled: July 15, 2016Date of Patent: February 11, 2020Assignee: Sony Semiconductor Solutions CorporationInventor: Yusuke Uesaka
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Publication number: 20190006407Abstract: The present technology relates to a solid-state imaging apparatus and an electronic device that are configured to enhance the accuracy in the detection of polarization information. The solid-state imaging apparatus has a pixel array block on which pixels each including a photoelectric conversion device are arranged; a polarizer, including a conductive light-shielding material, that covers a photosensitive surface of the above-mentioned photoelectric conversion device of at least part of the above-mentioned pixels; a light-shielding film, including a conductive light-shielding material, that is arranged between the above-mentioned adjacent pixels on the photosensitive surface side of the above-mentioned photoelectric conversion device; and a wiring layer arranged on a side opposite to the photosensitive surface of the above-mentioned photoelectric conversion device, in which the above-mentioned polarizer is connected to a wiring of the above-mentioned wiring layer via the above-mentioned light-shielding film.Type: ApplicationFiled: July 15, 2016Publication date: January 3, 2019Inventor: Yusuke UESAKA
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Publication number: 20180240825Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.Type: ApplicationFiled: April 24, 2018Publication date: August 23, 2018Inventors: Yusuke Uesaka, Atsuhiko Yamamoto
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Patent number: 10002892Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.Type: GrantFiled: September 27, 2016Date of Patent: June 19, 2018Assignee: Sony CorporationInventors: Yusuke Uesaka, Atsuhiko Yamamoto
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Publication number: 20170018585Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.Type: ApplicationFiled: September 27, 2016Publication date: January 19, 2017Inventors: Yusuke Uesaka, Atsuhiko Yamamoto
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Patent number: 9478569Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.Type: GrantFiled: October 10, 2014Date of Patent: October 25, 2016Assignee: Sony CorporationInventors: Yusuke Uesaka, Atsuhiko Yamamoto
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Publication number: 20150108595Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.Type: ApplicationFiled: October 10, 2014Publication date: April 23, 2015Inventors: Yusuke Uesaka, Atsuhiko Yamamoto