Patents by Inventor Yusuke

Yusuke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150071217
    Abstract: A transmitting apparatus includes a first communicator, a designator, and a second communicator. The first communicator sends out a message by wireless broadcast communication to plural first communication apparatus, being located within a wireless communication range of the first communicator, of plural communication apparatus that have a wireless broadcast communication function and that constitute a wireless multi-hop network. The designator designates a second communication apparatus that is located outside the wireless communication range of the first communicator and that can establish a first communication channel, from among the plural communication apparatus having a the wireless broadcast communication function. The second communicator is wider in a communication range than the first communicator. The second communicator establishes the first communication channel with the second communication apparatus designated by the designator.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke DOI, Yoshihiro OBA
  • Publication number: 20150070639
    Abstract: An electro-optical device may include a first substrate, a second substrate, a photo-curable seal member between the first substrate and the second substrate, a first light-shielding layer between the first substrate and the photo-curable seal member, and a second light-shielding layer between the first substrate and the first light-shielding layer. The first substrate may include a pixel area in which pixels are aligned, and a seal region around the pixel area and in which the photo-curable seal member is provided. Within the seal region, the second light-shielding layer may be larger in an outer shape or pattern than the shape or pattern of first light-shielding layer. The pixel area may include an interconnect layer made of the same layer as the one of the light-shielding layers, and the interconnect layer may be narrower than one of the light-shielding layers.
    Type: Application
    Filed: November 17, 2014
    Publication date: March 12, 2015
    Inventors: Yusuke Kinoe, Yoichi Momose
  • Publication number: 20150069337
    Abstract: An organic molecular device of an embodiment includes a first and a second conductive layers and an organic molecular layer having an organic molecule provided between the first and the second conductive layer. The organic molecule includes a one-dimensional or quasi one-dimensional ?-conjugated system chain having either a first aromatic ring or a second aromatic ring. The first aromatic ring has one or more substituents that are an electron withdrawing group, each substituent of the first aromatic ring is independently selected from the group consisting of the electron withdrawing group and hydrogen, the second aromatic ring has one or more substituents that are an electron releasing group, and each substituent of the second aromatic ring is independently selected from the group consisting of the electron releasing group and hydrogen. The first aromatic ring or the second aromatic ring exist in an unbalanced manner in the ?-conjugated system chain.
    Type: Application
    Filed: March 4, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki NISHIZAWA, Shigeki HATTORI, Yusuke TANAKA, Koji ASAKAWA
  • Publication number: 20150070975
    Abstract: A memory circuit includes: a bistable circuit (30) that writes data; nonvolatile elements (MTJ1, MTJ2) that store the data written in the bistable circuit into the nonvolataole element in a nonvolatile manner, and restore the data stored in a nonvolatile manner into the bistable circuit; and a determining unit (50) that does not store the data written in the bistable circuit into the nonvolatile elements when the data in the bistable circuit is the same as the data in the nonvolatile elements, but stores the data in the bistable circuit into the nonvolatile elements when the data in the bistable circuit is not the same as the data in the nonvolatile elements.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventors: Shuichiro Yamamoto, Yusuke Shuto, Satoshi Sugahara
  • Publication number: 20150069449
    Abstract: A light-emitting device which is thin and lightweight and has high flexibility, impact resistance, and reliability is provided. Further, a light-emitting device which is thin and lightweight and has high flexibility, impact resistance, and hermeticity is provided. In the light-emitting device in which a light-emitting region including a transistor and a light-emitting element is sealed between a first flexible substrate and a second flexible substrate, an opening is provided in the second flexible substrate around a region overlapping with the light-emitting region, the opening is filled with frit glass containing low-melting glass and bonding the first flexible substrate and the second flexible substrate, and the fit glass is provided so as to be in contact with an insulating layer provided over the first flexible substrate. The second flexible substrate may include an opening in a region overlapping with the light-emitting region.
    Type: Application
    Filed: November 18, 2014
    Publication date: March 12, 2015
    Inventor: Yusuke NISHIDO
  • Publication number: 20150073121
    Abstract: The purpose of the present invention is to provide a cross-linked peptide containing a novel non-peptide cross-linked structure, and a method for synthesizing the same. A cross-linked peptide having a novel non-peptide cross-linked structure, a useful intermediate for synthesizing the cross-linked peptide, and a method for synthesizing the novel cross-linked peptide and the intermediate are provided. The cross-linked peptide is characterized by having an —NR— bond in the cross-linked structure. By using the method for synthesizing the cross-linked peptide, a cross-link can be freely designed and an change can be freely made to a cross-link.
    Type: Application
    Filed: September 9, 2013
    Publication date: March 12, 2015
    Applicant: JITSUBO Co., Ltd.
    Inventors: Yusuke Kono, Shuji Fujita, Hideaki Suzuki, Mari Okumoto, Takashi Nakae, Kazuhiro Chiba
  • Publication number: 20150069569
    Abstract: According to one embodiment, a semiconductor memory device includes: a first semiconductor region extending in a first direction; second semiconductor regions extending in a second direction crossing the first direction from the first semiconductor region and arranged in the first direction; and a first element isolation region provided between the second semiconductor regions. A width of the first semiconductor region in the second direction is wider than a width of the second semiconductor region in the first direction.
    Type: Application
    Filed: February 11, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke OKUMURA, Naoki KAI
  • Publication number: 20150069318
    Abstract: A memory device according to an embodiment includes an ion metal layer, an opposing electrode, and a resistance change layer. The ion metal layer contains a first metal and a second metal. The resistance change layer is disposed between the ion metal layer and the opposing electrode. The first metal is able to move repeatedly through an interior of the resistance change layer. The concentration of the first metal in a central portion of the ion metal layer is higher than the concentration of the first metal in an end portion of the ion metal layer.
    Type: Application
    Filed: January 30, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke ARAYASHIKI, Kensuke TAKAHASHI
  • Patent number: 8975127
    Abstract: In an LCD driver, in a high voltage resistant MISFET, end portions of a gate electrode run onto electric field relaxing insulation regions. Wires to become source wires or drain wires are formed on an interlayer insulation film of the first layer over the high voltage resistant MISFET. At this moment, when a distance from an interface between a semiconductor substrate and a gate insulation film to an upper portion of the gate electrode is defined as “a”, and a distance from the upper portion of the gate electrode to an upper portion of the interlayer insulation film on which the wires are formed is defined as “b”, a relation of a>b is established. In such a high voltage resistant MISFET structured in this manner, the wires are arranged so as not to be overlapped planarly with the gate electrode of the high voltage resistant MISFET.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: March 10, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Yusuke Terada, Shigeya Toyokawa, Atsushi Maeda
  • Patent number: 8976286
    Abstract: An imaging apparatus comprises an optical imaging system 110, an image sensor 101, and an image processor 103. The optical imaging system 110 has an aberration control element 103 for generating a predetermined aberration. The optical imaging system 110 forms an optical image. The image sensor 101 generates an image signal corresponding to the optical image. The image processor 103 performs image processing on the image signal so as to enhance a degraded image characteristic on the basis of the predetermined aberration. The aberration control element 112 causes a response of an optical transfer function of the optical imaging system 110 to be zero at a first spatial frequency. The first spatial frequency is below a Nyquist frequency of the image sensor 201.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: March 10, 2015
    Assignee: KYOCERA Corporation
    Inventor: Yusuke Hayashi
  • Patent number: 8974550
    Abstract: A method of manufacturing a negative electrode plate for a non-aqueous secondary battery is disclosed, in which it is possible to assess whether or not a binder is localized in an electrode surface without lowering the productivity of the negative electrode plate. The method includes coating an electrode mixture containing at least a negative electrode active material and a binder to a current collector and drying the coated electrode mixture. The method includes an inspection step of measuring a reflectance of a coating surface of the negative electrode plate to thereby determine the quality of the negative electrode plate. If the reflectance of the coating surface of the negative electrode plate falls within a range of 15 to 35% when an incident angle and a light receiving angle each fall within the range of 80° to 90°, the negative electrode plate is determined to be excellent.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: March 10, 2015
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Yusuke Onoda, Takahiro Tsubouchi, Tomohiko Ishida
  • Patent number: 8976608
    Abstract: A semiconductor integrated circuit device that detects an operation error of an SRAM caused by a device variation fluctuating with time is provided. In the SRAM, a memory cell has a transfer MOS transistor whose gate is connected to a word line. At the time of a write test of the memory cell, a control circuit including a test/normal operation selection circuit and a word line driver circuit applies a third voltage to the word line in a preparation period before writing test data, thereafter a first voltage to the word line, and a second voltage to the word line at the end of writing. Due to this, the threshold voltage of the transfer MOS transistor, which fluctuates with time, can be controlled. Therefore, it is possible to enhance detection efficiency for a malfunctioning cell of the SRAM due to a temporal variation.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: March 10, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Goichi Ono, Yusuke Kanno, Akira Kotabe
  • Patent number: 8976425
    Abstract: According to one embodiment, an image scanning apparatus includes a document table on which an original document is stacked; a substrate; plural first light emitting elements located on one surface of the substrate, the first light emitting elements each emitting light for irradiating the original document on the document table with direct light not reflected by a reflection member; and plural second light emitting elements located on the other surface of the substrate, the second light emitting elements each emitting light for irradiating the original document on the document table with indirect light reflected by the reflection member. The reflection member includes a first reflection member and a second reflection member, and the first reflection member and the second reflection member are located in positions opposed to each other across a reflection optical path of light reflected by the original document on the document table.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: March 10, 2015
    Assignee: Toshiba TEC Kabushiki Kaisha
    Inventors: Hiroyuki Shiraishi, Naoaki Ide, Mitsuru Hatano, Sueo Ueno, Katsuya Nagamochi, Yusuke Hashizume, Naoya Koseki, Koji Shimokawa, Jun Sakakibara, Kenji Itagaki, Sasuke Endo
  • Patent number: 8975086
    Abstract: The present invention provides therapeutic agents and methods for treating cancer using the polypeptides composed of an amino acid sequence which includes a polypeptide fragment of DEPDC1. The polypeptides of the present invention can be introduced into cancer cells by modifying the polypeptides with transfection agents such as poly-arginine. Furthermore, the present invention provides methods of screening for therapeutic agents or compounds useful in inhibition of the DEPDC1/ZN-F224 complex formation or the treatment of cancer. The present invention also provides siRNAs targeting the ZNF224 gene, which are suggested to be useful in the treatment of bladder cancer.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: March 10, 2015
    Assignee: OncoTherapy Science, Inc.
    Inventors: Yusuke Nakamura, Toyomasa Katagiri, Akira Togashi
  • Patent number: 8975045
    Abstract: A method for efficiently producing an L-amino acid utilizing a bacterium belonging to the family Enterobacteriaceae from a fatty acid or an alcohol such as glycerol as a raw material is provided. A bacterium belonging to the family Enterobacteriaceae which is able to produce L-amino acid and harbors an RpsA protein which has a mutation such that the native aspartic acid residue at position 210 is replaced with another amino acid residue is used. This bacterium is cultured in a medium containing a carbon source selected from a fatty acid and an alcohol, and the produced L-amino acid is collected from the medium.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: March 10, 2015
    Assignee: Ajinomoto Co., Inc.
    Inventors: Hidetaka Doi, Yusuke Hagiwara, Yoshihiro Usuda
  • Patent number: 8977463
    Abstract: A vehicle brake controller is capable of executing limit control for limiting increase in braking force applied to front wheels by using a deceleration of a vehicle. The vehicle brake controller is configured to start the limit control when the deceleration of the vehicle becomes greater than or equal to a start determination value before a start determination time period elapses after a deceleration starting point in time, at which the deceleration of the vehicle is started by application of braking force at least to the front wheels. The vehicle brake controller is configured to end the limit control if the deceleration of the vehicle is less than an end determination value, which is greater than the start determination value, at a point in time when an end determination time period, which is longer than the start determination time period, has elapsed from the deceleration starting point in time.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 10, 2015
    Assignee: Advics Co., Ltd.
    Inventors: Takuya Inoue, Yusuke Takeya, Masato Terasaka
  • Patent number: 8973255
    Abstract: A circuit-substrate-related-operation performing apparatus for performing a circuit-substrate-related operation which is an operation on a circuit substrate, including: a plurality of heads including at least one work head and at least one detection head; a head holding device configured to hold, at a holding portion thereof, one of the plurality of heads; a moving device configured to move the head holding device; a head stock device in which the plurality of heads are stocked; and a controller configured to control the circuit-substrate-related-operation performing apparatus, wherein the controller includes a head attachment control portion configured to control the moving device and the head holding device such that the head holding device is moved to a set position which is set with respect to the head stock device and such that an arbitrary one of the plurality of heads is held by the head holding device.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: March 10, 2015
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventors: Masafumi Amano, Kazumi Hoshikawa, Mikio Nakajima, Hiroyuki Ao, Yusuke Yamakage
  • Patent number: 8973759
    Abstract: A sieving device including a hollow cylindrical body, a filter disposed at a bottom portion of the hollow cylindrical body, and a blade configured to rotate in close proximity to the filter around a rotation axis thereof crossing the filter to thereby stir powder supplied to the hollow cylindrical body.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: March 10, 2015
    Assignee: Ricoh Company, Ltd.
    Inventors: Hideo Ichikawa, Kaori Ozeki, Tatsushi Umayahara, Takashi Ono, Masayoshi Suzuki, Teruo Shibata, Keiichi Yano, Masato Suzuki, Eiichi Masushio, Hiroshi Sano, Yusuke Uchida, Junji Yamabe, Seiji Terazawa, Masashi Hasegawa
  • Patent number: 8975182
    Abstract: A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: March 10, 2015
    Assignees: Nissan Motor Co., Ltd., Sumitomo Metal Mining Co., Ltd., Sanken Electric Co., Ltd., Fuji Electric Co., Ltd.
    Inventors: Satoshi Tanimoto, Yusuke Zushi, Yoshinori Murakami, Takashi Iseki, Masato Takamori, Shinji Sato, Kohei Matsui
  • Patent number: 8973388
    Abstract: Even in the case of drop accident occurring due to a certain cause during transport or the like, it is intended by the present invention that any deformation of a motor support or a fan panel will not occur. A fan mechanism includes fan units having fan panels disposed vertically, motor supports mounted inwardly of said fan panels, motors mounted on said motor supports so that output shafts of the motors are parallel to the surfaces of the fan panels, fans positioned inwardly of said fan panels and driven by the motors, and spacers mounted to the motor supports so as to be positioned between the motor supports and a top plate or a bottom plate that serves as a bottom during conveyance.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: March 10, 2015
    Assignee: Fujitsu General Limited
    Inventor: Yusuke Hayashi