Abstract: An anisotropic conductive film that can be produced in high productivity and can reduce a short circuit occurrence ratio has a first conductive particle layer in which conductive particles are dispersed at a predetermined depth in a film thickness direction, and a second conductive particle layer in which conductive particles are dispersed at a depth different from that in the first conductive particle layer. In the respective conductive particle layers, the closest distances between the adjacent conductive particles are 2 times or more the average particle diameters of the conductive particles.

Abstract: An anisotropic conductive film contains conductive particles and spacers. The spacers are arranged at a central part of the film in a width direction. The central part of the film in the width direction represents 20 to 80% of the overall width of the film. The height of the spacers in the thickness direction of the anisotropic conductive film is larger than 5 ?m and less than 75 ?m. Such an anisotropic conductive film has a layered structure having a first insulating adhesion layer and a second insulating adhesion layer, wherein the conductive particles are dispersed in the first insulating adhesion layer, and the spacers are regularly arranged on a surface of the first insulating adhesion layer on a side of the second insulating adhesion layer.

Abstract: An anisotropic conductive film contains conductive particles and spacers. The spacers are arranged at a central part of the film in a width direction. The central part of the film in the width direction represents 20 to 80% of the overall width of the film. The height of the spacers in the thickness direction of the anisotropic conductive film is larger than 5 ?m and less than 75 ?m. Such an anisotropic conductive film has a layered structure having a first insulating adhesion layer and a second insulating adhesion layer, wherein the conductive particles are dispersed in the first insulating adhesion layer, and the spacers are regularly arranged on a surface of the first insulating adhesion layer on a side of the second insulating adhesion layer.

Abstract: An anisotropic conductive film that can be produced in high productivity and can reduce a short circuit occurrence ratio has a first conductive particle layer in which conductive particles are dispersed at a predetermined depth in a film thickness direction, and a second conductive particle layer in which conductive particles are dispersed at a depth different from that in the first conductive particle layer. In the respective conductive particle layers, the closest distances between the adjacent conductive particles are 2 times or more the average particle diameters of the conductive particles.

Abstract: To provide a conductive particle, containing: a core particle; and a conductive layer formed on a surface of the core particle, wherein the core particle is a nickel particle, and wherein the conductive layer is a nickel plating layer a surface of which has a phosphorous concentration of 10% by mass or lower, and the conductive layer has an average thickness of 1 nm to 10 nm.

Abstract: To provide a conductive particle, containing: a core particle; and a conductive layer formed on a surface of the core particle, wherein the core particle is a nickel particle, and wherein the conductive layer is a nickel plating layer a surface of which has a phosphorous concentration of 10% by mass or lower, and the conductive layer has an average thickness of 1 nm to 10 nm.

Abstract: A radio transmitter including a combiner which combines input I/Q signals with feedback I/Q signals, a power amplifier which amplifies the quadrature modulated signal, a detector which detects amplitude and phase differences between the input and feedback I/Q signals, a switch to turn on and off the feedback I/Q signals, a generator to generate control signals which minimizes the amplitude difference and the phase difference, in a state where a transmission power is set, during for a period during which the switch is turned off, an amplitude adjuster which adjusts an amplitude of the feedback RF signal, during a period during which the switch is turned on, and a phase adjuster which adjusts a phase of the local signal, during the period during which the switch is turned on.

Abstract: A control target circuit formed by transistors is provided with a power supply level control circuit for controlling the power supply voltage supplied to the control target circuit, a substrate level control circuit for controlling the substrate voltages of the transistors, and a special substrate level control circuit for controlling the substrate voltages during transition of the power supply voltage through a different system. During transition of the power supply voltage, the special substrate level control circuit positively controls the substrate voltages such that desired substrate voltage levels are reached earlier, whereby the time for the substrate voltages to transfer to the desired substrate voltage levels is shortened. To suppress latch-up and breakdown voltage degradation, the special substrate level control circuit controls supply of voltages and currents so as to comply with the potential difference conditions defined between the power supply voltage and the substrate voltages.

Abstract: A MOS resistance controlling device includes: a plurality of MOS transistors having a first MOS transistor to N-th (the integer N is larger than 1) MOS transistor being serially connected, the source of the first MOS transistor being set to a first reference potential, the drain the N-th MOS transistor being set to a second reference potential, and the drain of an I-th MOS transistor being connected to the source of an I+1-th MOS transistor, where I is an integer from 1 to N?1; a current source which is electrically disposed at connection node between the drain of the N-th MOS transistors and the second reference potential; and an operational amplifier having a first input terminal being supplied with a third reference potential, a second input terminal connected with the connection node and an output terminal being connected with gates of the MOS transistors.

Abstract: A control target circuit formed by transistors is provided with a power supply level control circuit for controlling the power supply voltage supplied to the control target circuit, a substrate level control circuit for controlling the substrate voltages of the transistors, and a special substrate level control circuit for controlling the substrate voltages during transition of the power supply voltage through a different system. During transition of the power supply voltage, the special substrate level control circuit positively controls the substrate voltages such that desired substrate voltage levels are reached earlier, whereby the time for the substrate voltages to transfer to the desired substrate voltage levels is shortened. To suppress latch-up and breakdown voltage degradation, the special substrate level control circuit controls supply of voltages and currents so as to comply with the potential difference conditions defined between the power supply voltage and the substrate voltages.

Abstract: An amplifier circuit according to the present invention comprises: a first differential amplifier circuit including a first transistor having a gate terminal forming a first input node, a second transistor having a gate terminal forming a second input node and having a dimensional ratio with respect to the first transistor of K:M (where K>M), and a first current source that supplies a first current to a source terminal of the first transistor and a source terminal of the second transistor; a second differential amplifier circuit including a third transistor having a gate terminal forming a third input node, a fourth transistor having a gate terminal forming a fourth input node and having a dimensional ratio with respect to the third transistor of M:K, and a second current source that supplies a second current to a source terminal of the third transistor and a source terminal of the fourth transistor, the second differential amplifier circuit having a same gain as the first differential amplifier circuit; a

Abstract: A radio transmitter including a combiner which combines input I/Q signals with feedback I/Q signals, a power amplifier which amplifies the quadrature modulated signal, a detector which detects amplitude and phase differences between the input and feedback I/Q signals, a switch to turn on and off the feedback I/Q signals, a generator to generate control signals which minimizes the amplitude difference and the phase difference, in a state where a transmission power is set, during for a period during which the switch is turned off, an amplitude adjuster which adjusts an amplitude of the feedback RF signal, during a period during which the switch is turned on, and a phase adjuster which adjusts a phase of the local signal, during the period during which the switch is turned on.

Abstract: A MOS resistance controlling device includes: a plurality of MOS transistors having a first MOS transistor to N-th (the integer N is larger than 1) MOS transistor being serially connected, the source of the first MOS transistor being set to a first reference potential, the drain the N-th MOS transistor being set to a second reference potential, and the drain of an I-th MOS transistor being connected to the source of an I+1-th MOS transistor, where I is an integer from 1 to N?1; a current source which is electrically disposed at connection node between the drain of the N-th MOS transistors and the second reference potential; and an operational amplifier having a first input terminal being supplied with a third reference potential, a second input terminal connected with the connection node and an output terminal being connected with gates of the MOS transistors.

Abstract: A MOS resistance controlling device includes: a plurality of MOS transistors having a first MOS transistor to N-th (the integer N is larger than 1) MOS transistor being serially connected, the source of the first MOS transistor being set to a first reference potential, the drain the N-th MOS transistor being set to a second reference potential, and the drain of an I-th MOS transistor being connected to the source of an I+1-th MOS transistor, where I is an integer from 1 to N?1; a current source which is electrically disposed at connection node between the drain of the N-th MOS transistors and the second reference potential; and an operational amplifier having a first input terminal being supplied with a third reference potential, a second input terminal connected with the connection node and an output terminal being connected with gates of the MOS transistors.

Abstract: A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.

Abstract: An amplifier circuit according to the present invention comprises: a first differential amplifier circuit including a first transistor having a gate terminal forming a first input node, a second transistor having a gate terminal forming a second input node and having a dimensional ratio with respect to the first transistor of K:M (where K>M), and a first current source that supplies a first current to a source terminal of the first transistor and a source terminal of the second transistor; a second differential amplifier circuit including a third transistor having a gate terminal forming a third input node, a fourth transistor having a gate terminal forming a fourth input node and having a dimensional ratio with respect to the third transistor of M:K, and a second current source that supplies a second current to a source terminal of the third transistor and a source terminal of the fourth transistor, the second differential amplifier circuit having a same gain as the first differential amplifier circuit; a

Abstract: A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.

Abstract: An amplifier comprises a first amplifier circuit which amplifies a first signal to output an amplified first signal, a circuit which outputs a second signal corresponding to a difference between the first signal and the amplified first signal, a second amplifier circuit which amplifies the second signal to output an amplified second signal, a combine circuit which outputs an amplified signal by combining the amplified second signal with the amplified first signal, and a controller which controls a supply of a power to the first amplifier circuit and the second amplifier circuit and has a first mode to supply the power to the second amplifier circuit without supplying the power to the first amplifier circuit.

Abstract: A semiconductor integrated circuit device according to the present invention includes: a sample circuit in which through current to be monitored flows during switching between transistors; a non-overlap circuit for outputting an output signal for the switching in the sample circuit; a current detector for detecting the through current flowing during the switching; and a current comparator in which a reference current value with respect to the through current has been set and which compares a current value detected by the current detector with the reference current value and outputs a result of the comparison to the non-overlap circuit.

Abstract: A power amplifier includes amplifier elements to amplify input signals of different frequencies. The amplifier also includes a power supply circuit that includes a common power supply path including an end connected to a power supply input terminal connected to a DC power supply. The amplifier further includes individual power supply paths each including an end connected to the other end of the common power supply path, and the other end connected to the main electrode of a corresponding one of the amplifier elements. The individual power supply paths have different impedances.