Patents by Inventor Yuta IIDA

Yuta IIDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12364041
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
    Type: Grant
    Filed: February 3, 2023
    Date of Patent: July 15, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Ryota Hodo, Yuta Iida
  • Publication number: 20240361796
    Abstract: A reference voltage generator circuit includes: a resistor circuit electrically connected between a first node and a second node and between the first node and a third node, the resistor circuit including a variable resistor whose resistance value varies according to a first control signal; a differential amplifier circuit in which one of a differential input pair is electrically connected to the second node and the other of the differential input pair is electrically connected to the third node, the differential amplifier circuit generating a reference voltage at an output node; a current source circuit electrically connected between the second node and a fourth node and between the third node and the fourth node; and an adjuster circuit configured to be electrically connected to the output node, the adjuster circuit configured to generate the first control signal by comparing at least two target voltages with the reference voltage.
    Type: Application
    Filed: July 9, 2024
    Publication date: October 31, 2024
    Inventors: Yuta IIDA, Kengo KOMIYA
  • Patent number: 12041765
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: July 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuichi Sato, Ryota Hodo, Yuta Iida, Tomoaki Moriwaka
  • Publication number: 20240090194
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Application
    Filed: August 10, 2023
    Publication date: March 14, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuichi SATO, Ryota HODO, Yuta IIDA, Tomoaki MORIWAKA
  • Patent number: 11791201
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: October 17, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Ryota Hodo, Yuta Iida, Satoru Okamoto
  • Publication number: 20230268361
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
    Type: Application
    Filed: February 3, 2023
    Publication date: August 24, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Motomu Kurata, Ryota HODO, Yuta IIDA
  • Patent number: 11729965
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: August 15, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuichi Sato, Ryota Hodo, Yuta Iida, Tomoaki Moriwaka
  • Patent number: 11574944
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: February 7, 2023
    Inventors: Motomu Kurata, Ryota Hodo, Yuta Iida
  • Publication number: 20220359523
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Application
    Filed: June 27, 2022
    Publication date: November 10, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuichi SATO, Ryota HODO, Yuta IIDA, Tomoaki MORIWAKA
  • Patent number: 11380688
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: July 5, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuichi Sato, Ryota Hodo, Yuta Iida, Tomoaki Moriwaka
  • Patent number: 11133420
    Abstract: A semiconductor device with high on-state current is provided.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: September 28, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuta Iida, Ryota Hodo, Kentaro Sugaya, Ryu Komatsu, Toshiya Endo, Shunpei Yamazaki
  • Publication number: 20210257251
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Application
    Filed: May 4, 2021
    Publication date: August 19, 2021
    Inventors: Motomu KURATA, Shinya SASAGAWA, Ryota HODO, Yuta IIDA, Satoru OKAMOTO
  • Patent number: 11004882
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: May 11, 2021
    Inventors: Motomu Kurata, Ryota Hodo, Yuta Iida
  • Patent number: 11004727
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: May 11, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Ryota Hodo, Yuta Iida, Satoru Okamoto
  • Publication number: 20200335630
    Abstract: A semiconductor device with high on-state current is provided.
    Type: Application
    Filed: December 19, 2018
    Publication date: October 22, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuta IIDA, Ryota HODO, Kentaro SUGAYA, Ryu KOMATSU, Toshiya ENDO, Shunpei YAMAZAKI
  • Publication number: 20200043931
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Application
    Filed: January 18, 2018
    Publication date: February 6, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuichi SATO, Ryota HODO, Yuta IIDA, Tomoaki MORIWAKA
  • Publication number: 20190393079
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Application
    Filed: August 30, 2019
    Publication date: December 26, 2019
    Inventors: Motomu KURATA, Shinya SASAGAWA, Ryota HODO, Yuta IIDA, Satoru OKAMOTO
  • Patent number: 10460984
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: October 29, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Ryota Hodo, Yuta Iida, Satoru Okamoto
  • Patent number: 10438982
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 8, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Ryota Hodo, Yuta Iida
  • Publication number: 20160307777
    Abstract: A minute transistor is provided. A transistor having low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. An electrode including the transistor is provided. A novel electrode is provided. The electrode includes a first conductive layer containing a metal, an insulating layer, and a second conductive layer. The insulating layer is formed over the first conductive layer. A mask layer is formed over the insulating layer. The insulating layer is etched using plasma with the mask layer used as a mask, whereby an opening is formed in the insulating layer so as to reach the first conductive layer. Plasma treatment is performed on at least the opening in an oxygen atmosphere. By the plasma treatment, a metal-containing oxide is formed on the first conductive layer in the opening. The oxide is removed, and then the second conductive layer is formed in the opening.
    Type: Application
    Filed: April 7, 2016
    Publication date: October 20, 2016
    Inventors: Motomu KURATA, Shinya SASAGAWA, Ryota HODO, Yuta IIDA, Satoru OKAMOTO