Patents by Inventor Yuta Kajiwara

Yuta Kajiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11237770
    Abstract: A protocol chip stores requests from a computer in a port queue, on the basis of an index indicating a slot of the port queue which allows subsequent storing. MPs each hold a CI of the slot having undergone a preceding search of the port queue by the MP, search this port queue from the slot that the pointer indicates, search for a request addressed to a logical device to which the MP corresponds, and store this request in a virtual queue corresponding to the logical device, to process the request.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: February 1, 2022
    Assignee: HITACHI, LTD.
    Inventors: Reoto Hotta, Yuta Kajiwara, Naoki Sakamoto, Kosuke Komikado, Shinjiro Shiraki, Hirokazu Ishii
  • Publication number: 20210191659
    Abstract: A protocol chip stores requests from a computer in a port queue, on the basis of an index indicating a slot of the port queue which allows subsequent storing. MPs each hold a CI of the slot having undergone a preceding search of the port queue by the MP, search this port queue from the slot that the pointer indicates, search for a request addressed to a logical device to which the MP corresponds, and store this request in a virtual queue corresponding to the logical device, to process the request.
    Type: Application
    Filed: September 23, 2020
    Publication date: June 24, 2021
    Inventors: Reoto HOTTA, Yuta KAJIWARA, Naoki SAKAMOTO, Kosuke KOMIKADO, Shinjiro SHIRAKI, Hirokazu ISHII
  • Publication number: 20180121091
    Abstract: A storage apparatus and its control method capable of effectively preventing degradation of response performance with respect to I/O commands are proposed. Regarding the storage apparatus and its control method, a command processing unit having ownership of a logical device is set to that logical device in advance with respect to each logical device; a plurality of logical units are managed as one group and one logical unit in the group is defined as a logical unit representative of the group; and when according to a format of a command issued from a host system a logical unit targeted by the command is a logical unit other than the logical unit representative of the logical unit in the group, the command is transferred to the command processing unit having the ownership of the logical device associated with the logical unit targeted by the command.
    Type: Application
    Filed: March 31, 2015
    Publication date: May 3, 2018
    Inventors: Ken TOKORO, Yuta KAJIWARA
  • Patent number: 9785520
    Abstract: A computer system has a storage system including a first port and a second port, and a relay apparatus which couples the first port to an initiator apparatus. The storage apparatus stores relay apparatus information indicating a relay apparatus, and initiator information indicating an initiator apparatus. The storage apparatus establishes communications between the first port and a first relay apparatus, and based on communications with the relay apparatus recognizes the initiator apparatus with which the first relay apparatus has established communications. The storage apparatus also stores, in pathway information, a first pathway containing the first port, the first relay apparatus and the initiator apparatus.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: October 10, 2017
    Assignee: HITACHI, LTD.
    Inventors: Yuta Kajiwara, Tomoyuki Kato, Ken Tokoro
  • Publication number: 20170212982
    Abstract: The present disclosure includes predicting a three-dimensional structure of one residue mutant of a membrane protein where respective amino acid residues have been substituted by all amino acids, calculating a solvation entropy change in formation of a tertiary structure from a primary structure or formation of the tertiary structure from secondary-structure units within a transmembrane segment, and extracting a candidate of an amino acid mutant to be thermostabilized based on a difference between a solvation entropy change in the membrane protein and a solvation entropy change in the amino acid mutant.
    Type: Application
    Filed: June 24, 2015
    Publication date: July 27, 2017
    Applicant: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Takeshi Murata, Masahiro KINOSHITA, Satoshi YASUDA, Yuuki TAKAMUKU, Kenji MIZUTANI, Nanao SUZUKI, Yuta KAJIWARA
  • Publication number: 20160259696
    Abstract: A computer system has a storage system including a first port and a second port, and a relay apparatus which couples the first port to an initiator apparatus. The storage apparatus stores relay apparatus information indicating a relay apparatus, and initiator information indicating an initiator apparatus. The storage apparatus establishes communications between the first port and a first relay apparatus, and based on communications with the relay apparatus recognizes the initiator apparatus with which the first relay apparatus has established communications. The storage apparatus also stores, in pathway information, a first pathway containing the first port, the first relay apparatus and the initiator apparatus.
    Type: Application
    Filed: April 4, 2014
    Publication date: September 8, 2016
    Applicant: HITACHI, LTD.
    Inventors: Yuta KAJIWARA, Tomoyuki KATO, Ken TOKORO
  • Patent number: 8407370
    Abstract: A plurality of command storage areas respectively corresponding to a plurality of priorities and storing I/O commands in a storage control apparatus are common to a plurality of ports and a plurality of processors. Here, regardless of which port receives an I/O command, the I/O command is stored in a command storage area corresponding to a priority which is given to the I/O command. The plurality of processors run the I/O commands in the plurality of command storage areas so that an I/O command with a higher priority is run more often within a given period of time.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: March 26, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Ken Tokoro, Yuta Kajiwara, Yasuhiko Yamaguchi
  • Publication number: 20120066413
    Abstract: A plurality of command storage areas respectively corresponding to a plurality of priorities and storing I/O commands in a storage control apparatus are common to a plurality of ports and a plurality of processors. Here, regardless of which port receives an I/O command, the I/O command is stored in a command storage area corresponding to a priority which is given to the I/O command. The plurality of processors run the I/O commands in the plurality of command storage areas so that an I/O command with a higher priority is run more often within a given period of time.
    Type: Application
    Filed: September 9, 2010
    Publication date: March 15, 2012
    Applicant: HITACHI, LTD.
    Inventors: Ken Tokoro, Yuta Kajiwara, Yasuhiko Yamaguchi