Patents by Inventor Yuta MIYAMOTO

Yuta MIYAMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220128634
    Abstract: In a magnetic sensor using a magnetic impedance effect, sensitivity is improved as compared to the case where a width of a sensitive element in the short direction is equal from one end to the other end in the longitudinal direction. The magnetic sensor includes: a non-magnetic substrate; and a sensitive element that is provided on the substrate, composed of a soft magnetic material, having a longitudinal direction and a short direction, provided with uniaxial magnetic anisotropy in a direction crossing the longitudinal direction, having a width at a center portion in the longitudinal direction that is smaller compared to a width at each of both end portions in the longitudinal direction, and sensing a magnetic field by a magnetic impedance effect.
    Type: Application
    Filed: October 12, 2021
    Publication date: April 28, 2022
    Applicant: SHOWA DENKO K.K.
    Inventors: Sho TONEGAWA, Akira Sakawaki, Yasumasa Watanabe, Daizo Endo, Tomoyuki Noguchi, Yuta Miyamoto
  • Patent number: 9548292
    Abstract: An ESD protection element can have a high ESD protection characteristic which has a desired breakdown voltage and flows a large discharge current. A junction diode is formed by an N+ type buried layer having a proper impurity concentration and a P+ type buried layer. The P+ type buried layer is combined with a P+ type drawing layer to penetrate an N? type epitaxial layer and be connected to an anode element. An N+ type diffusion layer and a P+ typed diffusion layer connected to an surrounding the N+ type diffusion layer are formed in the N? epitaxial layer surrounded by the P+ type buried layer etc. The N+ type diffusion layer and P+ type diffusion layer are connected to a cathode electrode. An ESD protection element is formed by the PN junction diode and a parasitic PNP bipolar transistor which uses the P+ type diffusion layer as an emitted, the N? type epitaxial layer as the base, and the P+ type drawing layer etc. as the collector.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: January 17, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Seiji Otake, Yasuhiro Takeda, Yuta Miyamoto
  • Publication number: 20140247527
    Abstract: An ESD protection element can have a high ESD protection characteristic which has a desired breakdown voltage and flows a large discharge current. A junction diode is formed by an N+ type buried layer having a proper impurity concentration and a P+ type buried layer. The P+ type buried layer is combined with a P+ type drawing layer to penetrate an N? type epitaxial layer and be connected to an anode element. An N+ type diffusion layer and a P+ typed diffusion layer connected to an surrounding the N+ type diffusion layer are formed in the N? epitaxial layer surrounded by the P+ type buried layer etc. The N+ type diffusion layer and P+ type diffusion layer are connected to a cathode electrode. An ESD protection element is formed by the PN junction diode and a parasitic PNP bipolar transistor which uses the P+ type diffusion layer as an emitted, the N? type epitaxial layer as the base, and the P+ type drawing layer etc. as the collector.
    Type: Application
    Filed: May 16, 2014
    Publication date: September 4, 2014
    Applicant: Semiconductor Components Industries, LLC
    Inventors: Seiji OTAKE, Yasuhiro TAKEDA, Yuta MIYAMOTO
  • Patent number: 8754479
    Abstract: An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a P+ type buried layer and a parasitic PNP bipolar transistor which uses a P+ type drawing layer connected to a P+ type diffusion layer as the emitter, an N? type epitaxial layer as the base, and a P type semiconductor substrate as the collector. The P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer connected to and surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, the parasitic PNP bipolar transistor turns on to flow a large discharge current.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: June 17, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Seiji Otake, Yasuhiro Takeda, Yuta Miyamoto
  • Patent number: 8618584
    Abstract: An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a first P+ type buried layer and a parasitic PNP bipolar transistor which uses a second P+ type buried layer connected to a P+ type diffusion layer as the emitter, an N? type epitaxial layer as the base, and the first P+ type buried layer as the collector. The first P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, and the parasitic PNP bipolar transistor turns on to flow a large discharge current.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: December 31, 2013
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Seiji Otake, Yasuhiro Takeda, Yuta Miyamoto
  • Publication number: 20130075864
    Abstract: An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a P+ type buried layer and a parasitic PNP bipolar transistor which uses a P+ type drawing layer connected to a P+ type diffusion layer as the emitter, an N? type epitaxial layer as the base, and a P type semiconductor substrate as the collector. The P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer connected to and surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, the parasitic PNP bipolar transistor turns on to flow a large discharge current.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 28, 2013
    Applicant: Semiconductor Components Industries, LLC
    Inventors: Seiji OTAKE, Yasuhiro TAKEDA, Yuta MIYAMOTO
  • Publication number: 20130075866
    Abstract: A PN junction diode is formed by an N+ type buried layer having a proper impurity concentration and a P+ type buried layer. The P+ type buried layer is combined with a P+ type drawing layer to penetrate an N? type epitaxial layer and be connected to an anode electrode. An N+ type diffusion layer and a P+ type diffusion layer connected to and surrounding the N+ type diffusion layer are formed in the N? type epitaxial layer surrounded by the P+ type buried layer etc. The N+ type diffusion layer and the P+ type diffusion layer are connected to a cathode electrode. An ESD protection element is formed by the PN junction diode and a parasitic PNP bipolar transistor which uses the P+ type diffusion layer as the emitter, the N? type epitaxial layer as the base, and the P+ type drawing layer etc as the collector.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 28, 2013
    Applicant: Semiconductor Components Industries, LLC
    Inventors: Seiji Otake, Yasuhiro Takeda, Yuta Miyamoto
  • Publication number: 20130075865
    Abstract: An ESD protection element is formed by a PN junction diode including an N+ type buried layer having a proper impurity concentration and a first P+ type buried layer and a parasitic PNP bipolar transistor which uses a second P+ type buried layer connected to a P+ type diffusion layer as the emitter, an N? type epitaxial layer as the base, and the first P+ type buried layer as the collector. The first P+ type buried layer is connected to an anode electrode, and the P+ type diffusion layer and an N+ type diffusion layer surrounding the P+ type diffusion layer are connected to a cathode electrode. When a large positive static electricity is applied to the cathode electrode, and the parasitic PNP bipolar transistor turns on to flow a large discharge current.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 28, 2013
    Applicant: Semiconductor Components Industries, LLC
    Inventors: Seiji OTAKE, Yasuhiro TAKEDA, Yuta MIYAMOTO