Abstract: A route generation system includes a diagnosis unit, a generation unit, and an output unit. The diagnosis unit performs a diagnosis to estimate a deterioration degree of a road surface from an image to be monitored. The generation unit generates a travel route based on the deterioration degree of the road surface for each point diagnosed by the diagnosis unit and information regarding a road environment affecting the diagnosis for each point, the travel route being generated for capturing another image used for another diagnosis. The output unit outputs the generated travel route.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is lower in crystallinity than the first region and the second region.

Abstract: A shoe assembly includes a base shoe (10), a removable outsole (25) and a removable cover (22). The base shoe (10) is defined by a skeleton insole (11) having a lower surface, a heel component (12), and an upper (13) rising from the periphery of the skeleton insole (11). The upper (13) defines a foot-retaining element. The removable outsole (25) is connected to the skeleton insole (11) to overlie the lower surface thereof. There is a releasable mechanism having a first part on the skeleton insole (11) and a second part on the outsole (25) to interconnect the two. The removable cover (22) is for the upper (13), and fits over the base shoe (10) to overlie the foot-retaining element. The cover (22) has a sole region provided with a sole opening for accommodation of the releasable mechanism interconnecting the outsole (25) with the skeleton insole (11). The cover (22) also has a heel opening (23) through which at least a part of the heel component (12) passes.

Abstract: Provided are a laser annealing apparatus, a laser annealing method, and a mask with which scan nonuniformity can be decreased. According to the present invention, all or some openings of a plurality of openings are configured so that a partial subregion of a prescribed region is irradiated with laser light. The plurality of openings are configured so that, between prescribed regions irradiated with laser light via a group of openings in one row arranged in a row direction and prescribed regions irradiated with laser light via a group of openings in another row arranged in the row direction, the number of times of laser light radiations in subregions having the same occupying region is the same, and at least two openings of a group of openings arranged in a column direction have different positions or shapes.

Abstract: A thin film transistor includes: a gate electrode supported on a substrate; a gate insulating layer that covers the gate electrode; an oxide semiconductor layer provided on the gate insulating layer and having a crystalline region, the crystalline region including a first region, a second region, and a channel region located between the first region and the second region, wherein the channel region, the first region and the second region overlap with the gate electrode with the gate insulating layer interposed therebetween; a protection insulating layer arranged on the oxide semiconductor layer so that the channel region is covered and the first region and the second region are exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region, wherein a crystallinity of the channel region is different from a crystallinity of the first region and the second region.

Abstract: Provided are a laser annealing apparatus, a laser annealing method, and a mask with which scan nonuniformity can be decreased. According to the present invention, all or some openings of a plurality of openings are configured so that a partial subregion of a prescribed region is irradiated with laser light. The plurality of openings are configured so that, between prescribed regions irradiated with laser light via a group of openings in one row arranged in a row direction and prescribed regions irradiated with laser light via a group of openings in another row arranged in the row direction, the number of times of laser light radiations in subregions having the same occupying region is the same, and at least two openings of a group of openings arranged in a column direction have different positions or shapes.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is higher in crystallinity than the first region and the second region.

Abstract: The present invention provides an acoustic characteristic calibration method superior in at least one of improved repeatability of an inspection state, a reduced influence of a noise in calibrating an acoustic characteristic, and a reduced load in FFT arithmetic processing. A reference acoustic signal is output from a sound output unit (10) and input to a sound input unit (20) of a vehicle inspection device (2). The signal input to the sound input unit (20) is subjected to A/D conversion, and then the FFT arithmetic processing is carried out thereby to detect the frequency response characteristic of the sound input unit (20). The frequency response characteristic of the sound input unit (20) and the frequency characteristic of the reference acoustic signal are compared to determine the correction factor at each frequency. Based on the correction factor, the frequency response characteristic of the sound input unit (20) is calibrated.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is higher in crystallinity than the first region and the second region.

Abstract: A thin film transistor according to an embodiment of the present invention includes: a gate electrode supported by a substrate; a gate insulating layer covering the gate electrode; a silicon semiconductor layer being provided on the gate insulating layer and having a crystalline silicon region, the crystalline silicon region including a first region, a second region, and a channel region located between the first region and the second region, such that the channel region, the first region, and the second region overlap the gate electrode via the gate insulating layer; an insulating protection layer disposed on the silicon semiconductor layer so as to cover the channel region and allow the first region and the second region to be exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region. The channel region is lower in crystallinity than the first region and the second region.

Abstract: A thin film transistor includes: a gate electrode supported on a substrate; a gate insulating layer that covers the gate electrode; an oxide semiconductor layer provided on the gate insulating layer and having a crystalline region, the crystalline region including a first region, a second region, and a channel region located between the first region and the second region, wherein the channel region, the first region and the second region overlap with the gate electrode with the gate insulating layer interposed therebetween; a protection insulating layer arranged on the oxide semiconductor layer so that the channel region is covered and the first region and the second region are exposed; a source electrode electrically connected to the first region; and a drain electrode electrically connected to the second region, wherein a crystallinity of the channel region is different from a crystallinity of the first region and the second region.

Abstract: An electrical component socket includes a socket body arranged on a circuit board and including a receiving portion configured to receive an electrical component. The socket body includes an arrangement portion in which a row of contact pins to be in contact with leads of an IC package is arranged. At least one of these contact pins and another one of the contact pins adjacent to the at least one of the contact pins have an arrangement pitch that is narrower than a pitch between the terminals of the electrical component, and the other one of the contact pins and still another one of the contact pins adjacent to the other one of the contact pins have an arrangement pitch that is substantially equal to the pitch between the terminals of the electrical component.

Abstract: A shoe assembly comprises a base shoe (10), a removable outsole (25) and a removable cover (22). The base shoe (10) is defined by a skeleton insole (11) having a lower surface, a heel component (12), and an upper (13) rising from the periphery of the skeleton insole (11). The upper (13) defines a foot-retaining element. The removable outsole (25) is connected to the skeleton insole (11) to overlie the lower surface thereof. There is a releasable mechanism having a first part on the skeleton insole (11) and a second part on the outsole (25) to interconnect the two. The removable cover (22) is for the upper (13), and fits over the base shoe (10) to overlie the foot-retaining element. The cover (22) has a sole region provided with a sole opening for accommodation of the releasable mechanism interconnecting the outsole (25) with the skeleton insole (11). The cover (22) also has a heel opening (23) through which at least a part of the heel component (12) passes.

Abstract: An electrical component socket includes a socket body arranged on a circuit board and including a receiving portion configured to receive an electrical component. The socket body includes an arrangement portion in which a row of contact pins to be in contact with leads of an IC package is arranged. At least one of these contact pins and another one of the contact pins adjacent to the at least one of the contact pins have an arrangement pitch that is narrower than a pitch between the terminals of the electrical component, and the other one of the contact pins and still another one of the contact pins adjacent to the other one of the contact pins have an arrangement pitch that is substantially equal to the pitch between the terminals of the electrical component.

Abstract: A method of manufacturing a TFT substrate includes the steps of forming an oxide semiconductor layer above a substrate, forming a first oxide film on the oxide semiconductor layer, performing oxidation processing on the oxide semiconductor layer after formation of the first oxide film, and forming a second oxide film on the first oxide film after the oxidation processing.

Abstract: A heel construction for a high heeled shoe 11 includes a sole plate 10 and a heel pin 12 projecting downwardly from the sole plate. A detachable heel component 16 is fitted to the heel pin and a releasable locking arrangement serves to secure the heel component to the heel pin. The locking arrangement may comprise a threaded region 20 on the pin and engageable by a nut 23 carried in the heel component 16 or may comprise snap fittings 52,57 on the heel pin and within the heel component, to secure the heel component to the heel pin.

Abstract: The present invention provides an acoustic characteristic calibration method superior in at least one of improved repeatability of an inspection state, a reduced influence of a noise in calibrating an acoustic characteristic, and a reduced load in FFT arithmetic processing. A reference acoustic signal is output from a sound output unit (10) and input to a sound input unit (20) of a vehicle inspection device (2). The signal input to the sound input unit (20) is subjected to A/D conversion, and then the FFT arithmetic processing is carried out thereby to detect the frequency response characteristic of the sound input unit (20). The frequency response characteristic of the sound input unit (20) and the frequency characteristic of the reference acoustic signal are compared to determine the correction factor at each frequency. Based on the correction factor, the frequency response characteristic of the sound input unit (20) is calibrated.

Abstract: The object of the present invention is to reduce the wear of the doctor blade applied to the wet paper web transfer belt and the wear of the guide rolls supporting the wet paper web transfer belt while maintaining the wear resistance of the wet paper web contacting surface and the machine contacting surface of the wet paper web transfer belt together with the adhesive and releasing properties of the wet paper web on the wet paper web contacting surface of conventional wet paper web transfer belts. This is achieved by a wet paper web transfer belt in which a polyurethane is integrated with a reinforcing base material comprising a wet paper web-side surface and a machine-side surface, at least the wet paper web-side surface of the reinforcing base material is embedded in the polyurethane, an outer circumferential layer comprising a wet paper web contacting surface is constituted by some of the polyurethane; wherein, at least the outer circumferential layer comprises a spherical filler.

Abstract: A thin film transistor device including: a substrate; a gate electrode; an electrode pair composed of a source electrode and a drain electrode; a channel layer; and a passivation layer. The channel layer is made of an oxide semiconductor. The passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate. The first layer is made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer is made of an Al compound, and the third layer is made of one of silicon oxide, silicon nitride, and silicon oxynitride.

Abstract: A TFT device including: a gate electrode; a channel layer above the gate electrode; a channel protection layer on the channel layer; an electrode pair on the channel protection layer composed of a source electrode and a drain electrode that are spaced away from one another, a part of each of the source electrode and the drain electrode in contact with the channel layer through the channel protection layer; and a passivation layer extending over the gate electrode, the channel layer, the electrode pair, and the channel protection layer. The channel layer is made of an oxide semiconductor. The TFT device has a first sub-layer made of one of silicon nitride and silicon oxynitride and in which Si—H density is no greater than 2.3×1021 cm?3. The first sub-layer is included in at least one of the channel protection layer and the passivation layer.