Abstract: A ceramic circuit substrate having high bonding performance and excellent thermal cycling resistance properties, wherein a ceramic substrate and a copper plate are bonded by a braze material containing Ag and Cu, at least one active metal component selected from Ti and Zr, and at least one element selected from among In, Zn, Cd, and Sn, wherein a braze material layer, after bonding, has a continuity ratio of 80% or higher and a Vickers hardness of 60 to 85 Hv.

Abstract: A bonded substrate includes a substrate, a metal plate forming a stacked state with the substrate, and bonding member. The metal plate has a first surface on the substrate side and a second surface opposite; wherein an edge of the first surface is located outside an edge of the second. The bonding member is disposed between the substrate and plate to bond the plate and substrate, and protrudes from the edge over an entire periphery of the plate. In cut surfaces obtained by cutting the bonded substrate, a peripheral surface length (A) from a portion corresponding to a peripheral edge of the first surface to a corresponding portion of the second, protrusion length of the bonding member, and thickness (C) of the metal plate satisfy first and second expressions. 0.032?B/(A+B)?0.400??(First Expression) 0.5(mm)?C?2.

Abstract: A ceramic circuit substrate is suitable for silver nanoparticle bonding of semiconductor elements and has excellent close adhesiveness with a power module sealing resin. A ceramic circuit substrate has a copper plate bonded, by a braze material, to both main surfaces of a ceramic substrate including aluminum nitride or silicon nitride, the copper plate of at least one of the main surfaces being subjected to silver plating, wherein: the copper plate side surfaces are not subjected to silver plating; the thickness of the silver plating is 0.1 ?m to 1.5 ?m; and the arithmetic mean roughness Ra of the surface roughness of the circuit substrate after silver plating is 0.1 ?m to 1.5 ?m.

Abstract: A silicon nitride substrate includes silicon nitride and magnesium, in which when a surface of the silicon nitride substrate is analyzed with an X-ray fluorescence spectrometer under the specific Condition I, XB/XA is 0.8 or more and 1.0 or less.

Abstract: A bonded substrate includes a substrate, a metal plate forming a stacked state with the substrate, and bonding member. The metal plate has a first surface on the substrate side and a second surface opposite; wherein an edge of the first surface is located outside an edge of the second. The bonding member is disposed between the substrate and plate to bond the plate and substrate, and protrudes from the edge over an entire periphery of the plate. In cut surfaces obtained by cutting the bonded substrate, a peripheral surface length (A) from a portion corresponding to a peripheral edge of the first surface to a corresponding portion of the second, protrusion length of the bonding member, and thickness (C) of the metal plate satisfy first and second expressions. 0.032?B/(A+B)?0.400??(First Expression) 0.5 (mm)?C?2.

Abstract: A ceramic circuit substrate having high bonding performance and excellent thermal cycling resistance properties, wherein a ceramic substrate and a copper plate are bonded by a braze material containing Ag and Cu, at least one active metal component selected from Ti and Zr, and at least one element selected from among In, Zn, Cd, and Sn, wherein a braze material layer, after bonding, has a continuity ratio of 80% or higher and a Vickers hardness of 60 to 85 Hv.

Abstract: A ceramic circuit substrate is suitable for silver nanoparticle bonding of semiconductor elements and has excellent close adhesiveness with a power module sealing resin. A ceramic circuit substrate has a copper plate bonded, by a braze material, to both main surfaces of a ceramic substrate including aluminum nitride or silicon nitride, the copper plate of at least one of the main surfaces being subjected to silver plating, wherein: the copper plate side surfaces are not subjected to silver plating; the thickness of the silver plating is 0.1 ?m to 1.5 ?m; and the arithmetic mean roughness Ra of the surface roughness of the circuit substrate after silver plating is 0.1 ?m to 1.5 ?m.