Patents by Inventor Yutaba Hayashi

Yutaba Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for making and programming and operating a dual-bit multi-level ballistic MONOS memory
    Patent number: 6248633
    Abstract: A fast low voltage ballistic program, ultra-short channel, ultra-high density, dual-bit multi-level flash memory is described with a two or three polysilicon split gate side wall process. The structure and operation of this invention is enabled by a twin MONOS cell structure having an ultra-short control gate channel of less than 40nm, with ballistic injection which provides high electron injection efficiency and very fast program at low program voltages of 3˜5V. The cell structure is realized by (i) placing side wall control gates over a composite of Oxide-Nitride-Oxide (ONO) on both sides of the word gate, and (ii) forming the control gates and bit diffusion by self-alignment and sharing the control gates and bit diffusions between memory cells for high density.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: June 19, 2001
    Assignee: Halo LSI Design & Device Technology, Inc.
    Inventors: Seiki Ogura, Yutaba Hayashi, Tomoko Ogura