Patents by Inventor Yutaka Akimoto

Yutaka Akimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7317610
    Abstract: A sheet-shaped capacitor for storing electrical charges of large capacities, and to assure facilitated manufacture, cost reduction and improved reliability, and a method for manufacturing the capacitor. The capacitor includes a dielectric film 12, formed on a first major surface of a metal plate 11, an electrically conductive high polymer layer 13, formed on a first major surface of the dielectric film, and an electrically conductive layer 14 formed on a first major surface of the electrically conductive high polymer layer 13, such as by copper plating. A cathode electrode 20 is led out from the electrically conductive layer 14 on the side electrically conductive high polymer layer 13.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: January 8, 2008
    Assignees: NEC Toppan Circuit Solutions, Inc., NEC Tokin Corporation
    Inventors: Hirofumi Nakamura, Yutaka Akimoto, Sadamu Toita, Takayuki Inoi, Katsuhiro Yoshida
  • Publication number: 20060120014
    Abstract: A sheet-shaped capacitor for storing electrical charges of large capacities, and to assure facilitated manufacture, cost reduction and improved reliability, and a method for manufacturing the capacitor. The capacitor includes a dielectric film 12, formed on a first major surface of a metal plate 11, an electrically conductive high polymer layer 13, formed on a first major surface of the dielectric film, and an electrically conductive layer 14 formed on a first major surface of the electrically conductive high polymer layer 13, such as by copper plating. A cathode electrode 20 is led out from the electrically conductive layer 14 on the side electrically conductive high polymer layer 13.
    Type: Application
    Filed: November 15, 2005
    Publication date: June 8, 2006
    Applicants: NEC Toppan Circuit Solutions, INC., NEC Tokin Corporation
    Inventors: Hirofumi Nakamura, Yutaka Akimoto, Sadamu Toita, Takayuki Inoi, Katsuhiro Yoshida
  • Patent number: 7051000
    Abstract: A purchasing company registers selling companies with which she does not want to trade in a setting management unit, and a selling company registers purchasing companies with which she does not want to trade in the setting management unit. The registration information is stored in a selling company/purchasing company table. An electronic catalog is made public only to purchasing companies with which the selling company permits trade. A transaction unit makes an estimate request received from a purchasing company public only to selling companies with which the purchasing company permits trade.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: May 23, 2006
    Assignee: Fujitsu Limited
    Inventors: Michiteru Kodama, Hiroaki Matsuo, Yasuo Noshiro, Katsuro Saito, Yutaka Akimoto, Teruo Mizutani, Hideyuki Takahashi, Yuichi Nakamura
  • Patent number: 6717494
    Abstract: Occurrence of EMI is reduced without a sharp increase of the manufacturing cost by suppressing a common mode current stably. There is provided a disclosed printed-circuit board being adapted such that a width of an outer edge section of a T-shaped pattern is widened so as to surround a recessed section with a frame-shaped additional electric conductor by electrically connecting the frame-shaped additional electric conductor with the T-shaped pattern making up a ground pattern so as to close the recessed section.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: April 6, 2004
    Assignee: NEC Toppan Circuit Solutions, Inc.
    Inventors: Hideo Kikuchi, Toshiyuki Kaneko, Hideki Kikuchi, Kazuhiro Kinoshita, Kiyohiko Kaiya, Yutaka Akimoto
  • Publication number: 20030021097
    Abstract: Occurrence of EMI is reduced without a sharp increase of the manufacturing cost by suppressing a common mode current stably. There is provided a disclosed printed-circuit board being adapted such that a width of an outer edge section of a T-shaped pattern is widened so as to surround a recessed section with a frame-shaped additional electric conductor by electrically connecting the frame-shaped additional electric conductor with the T-shaped pattern making up a ground pattern so as to close the recessed section.
    Type: Application
    Filed: March 20, 2002
    Publication date: January 30, 2003
    Inventors: Hideo Kikuchi, Toshiyuki Kaneko, Hideki Kikuchi, Kazuhiro Kinoshita, Kiyohiko Kaiya, Yutaka Akimoto
  • Patent number: 6412097
    Abstract: A layout compaction method adapted to be embodied in computer program product and adapted for compacting a circuit layout having a plurality of layers on which moving objects form layer patterns, wherein the moving objects comprising components and wires. The method assumes a graph problem under condition which prevent the compacted result from violation of the design rule, and then, solves the graph problem to determine a moving order, a moving direction, and a moving distance of each component for moving the components to thereby perform the compacting the circuit layout. After that, the method moves each component according to the moving order, the moving direction and the moving distance to obtain a compacted circuit layout.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: June 25, 2002
    Assignee: NEC Corporation
    Inventors: Hideo Kikuchi, Keiji Nagano, Yutaka Akimoto
  • Patent number: 6301686
    Abstract: In a graphic layout compaction system for compacting a layout where components and routes are placed on a two-dimensional space, a terminal graph generator prepares terminal graph data indicative of terminal graphs having component terminals as nodes. The terminal graph generator calculates, as a movement amount for allowing a first component terminal to come near a second component terminal, a movement limit area within which the first component terminal can move in any directions towards the second component terminal in consideration of a route bandwidth interposed therebetween. A component compactor moves the first component terminal on a position where the first component terminal is not interfered with the movement limit area. A rerouting unit shapes routes into shaped routes having configurations including oblique parts to reroute the shaped routes in a space between the first and the second component terminals.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: October 9, 2001
    Assignee: NEC Corporation
    Inventors: Hideo Kikuchi, Yutaka Akimoto, Toshiyuki Kaneko
  • Publication number: 20010005835
    Abstract: A purchasing company registers selling companies with which she does not want to trade in a setting management unit, and a selling company registers purchasing companies with which she does not want to trade in the setting management unit. The registration information is stored in a selling company/purchasing company table. An electronic catalog is made public only to purchasing companies with which the selling company permits trade. A transaction unit makes an estimate request received from a purchasing company public only to selling companies with which the purchasing company permits trade.
    Type: Application
    Filed: December 6, 2000
    Publication date: June 28, 2001
    Inventors: Michiteru Kodama, Hiroaki Matsuo, Yasuo Noshiro, Katsuro Saito, Yutaka Akimoto, Teruo Mizutani, Hideyuki Takahashi, Yuichi Nakamura