Abstract: Asynchronous command data are converted to synchronous data by a synchronizer comprising a toggle flip-flop which receives the asynchronous command data to produce a pair of true and complementary outputs in response to a transition of the command data. A first NOR gate is responsive to the command pulses and the true output of the toggle flip-flop to produce a train of first pulses, and a second NOR gate is responsive to the command pulses and the complementary output of toggle flip-flop to produce a train of second pulses. First and second sampling flip-flops are connected to the outputs of the first and second NOR gates, respectively, to sample the first and second pulses therefrom in response to a trailing edge transition of a clock signal with a frequency twice as high as the nominal maximum frequency of the command pulses.

Abstract: A mode selection circuit for supplying a mode selection signal and a reset signal to an apparatus having a plurality of operating modes each time an operating mode is selected includes a mode switch to which the operating mode is manually set, a mode register for outputting data representing the operating mode designated by a software command, a first AND gate for receiving outputs from the mode switch and the mode register and supplying an output to the apparatus as the mode selection signal, a first reset signal generator for generating a first reset signal in accordance with one of a power switch and a reset switch, a second reset signal generator for generating a second reset signal designated by the software command, and a second AND gate for selecting one of the first and second reset signals and outputting the selected signal to the apparatus as the reset signal.