Patents by Inventor Yutaka Iwata
Yutaka Iwata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8842797Abstract: A gamma scanning apparatus includes a moving and fixing mechanism which moves/fixes a housing to a definite position, and a rotating and moving mechanism which moves a fuel assembly vertically in addition to rotating the assembly. A gamma-ray counting circuit measures an output of a gamma-ray detector, and a data collecting/analyzing and controlling apparatus analyzes data output from the gamma-ray counting circuit, in association with data relating to the rotation and movement of the fuel assembly by the rotating and moving mechanism. The rotating and moving mechanism, after fixing the vertical position of the fuel assembly with the housing also fixed, rotates the fuel assembly through 360° with its height kept constant, and during the 360° rotation of the fuel assembly, the gamma-ray counting circuit measures either a time average of count values of the detector during the rotation or an integral value within a fixed time.Type: GrantFiled: November 28, 2011Date of Patent: September 23, 2014Assignee: Hitachi-GE Nuclear Energy, Ltd.Inventors: Takahiro Tadokoro, Hiroshi Kitaguchi, Katsunori Ueno, Yutaka Iwata, Ryusuke Kimura
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Patent number: 8822839Abstract: A multi-layer printed circuit board including a core substrate, lower interlayer resin insulating layers formed on the surfaces of the core substrate, respectively, through-hole conductors formed in penetrating holes penetrating through the core substrate and the lower interlayer resin insulating layers, conductor circuits formed on the lower interlayer resin insulating layers, respectively, upper interlayer resin insulating layers formed on the conductor circuits and the lower interlayer resin insulating layers, respectively and via hole conductors formed in the upper interlayer resin insulating layers and positioned on the through-hole conductors, respectively.Type: GrantFiled: November 30, 2011Date of Patent: September 2, 2014Assignee: Ibiden Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Publication number: 20120134459Abstract: A gamma scanning apparatus includes a moving and fixing mechanism which moves/fixes a housing to a definite position, and a rotating and moving mechanism which moves a fuel assembly vertically in addition to rotating the assembly. A gamma-ray counting circuit measures an output of a gamma-ray detector, and a data collecting/analyzing and controlling apparatus analyzes data output from the gamma-ray counting circuit, in association with data relating to the rotation and movement of the fuel assembly by the rotating and moving mechanism. The rotating and moving mechanism, after fixing the vertical position of the fuel assembly with the housing also fixed, rotates the fuel assembly through 360° with its height kept constant, and during the 360° rotation of the fuel assembly, the gamma-ray counting circuit measures either a time average of count values of the detector during the rotation or an integral value within a fixed time.Type: ApplicationFiled: November 28, 2011Publication date: May 31, 2012Inventors: Takahiro TADOKORO, Hiroshi Kitaguchi, Katsunori Ueno, Yutaka Iwata, Ryusuke Kimura
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Publication number: 20120104261Abstract: A fuel assembly radiation measuring apparatus has a radiation signal generation apparatus including a LaBr3(Ce) scintillator, an A/D converter, a signal processing apparatus, and a data analysis apparatus. The signal processing apparatus has a FPGA and a CPU. ? rays emitted from a fuel assembly disposed in water in a fuel pool enter into the LaBr3(Ce) scintillator that emits scintillator light, then a photomultiplier tube converts the light into an electric signal as a radiation detection signal. A pulse height analyzer of the FPGA inputs a radiation detection signal having a digital waveform generated by the A/D converter and changes the digital waveform into a trapezoid waveform to obtain a maximum peak value. The data analysis apparatus quantifies a target nuclide using a plurality of inputted maximum peak values to obtain burnup.Type: ApplicationFiled: October 25, 2011Publication date: May 3, 2012Inventors: Hiroshi Kitaguchi, Takahiro Tadokoro, Katsunori Ueno, Yutaka Iwata, Ryusuke Kimura
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Publication number: 20120067633Abstract: A multi-layer printed circuit board including a core substrate, lower interlayer resin insulating layers formed on the surfaces of the core substrate, respectively, through-hole conductors formed in penetrating holes penetrating through the core substrate and the lower interlayer resin insulating layers, conductor circuits formed on the lower interlayer resin insulating layers, respectively, upper interlayer resin insulating layers formed on the conductor circuits and the lower interlayer resin insulating layers, respectively and via hole conductors formed in the upper interlayer resin insulating layers and positioned on the through-hole conductors, respectively.Type: ApplicationFiled: November 30, 2011Publication date: March 22, 2012Applicant: IBIDEN CO., LTD.Inventors: Yogo KAWASAKI, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Patent number: 8106310Abstract: A multi-layer printed circuit board having interlayer resin insulating layers on both sides of a core substrate, respectively, through holes provided to penetrate the core substrate and filled with resin filler, the interlayer resin insulating layers and conductor circuits provided. The resin filler contains an epoxy resin, a curing agent and 10 to 50% of inorganic particles.Type: GrantFiled: September 15, 2009Date of Patent: January 31, 2012Assignee: Ibiden Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Patent number: 7999194Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: GrantFiled: July 24, 2008Date of Patent: August 16, 2011Assignee: IBIDEN Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Patent number: 7795542Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: GrantFiled: January 18, 2006Date of Patent: September 14, 2010Assignee: IBIDEN Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Publication number: 20100006328Abstract: A multi-layer printed circuit board having interlayer resin insulating layers on both sides of a core substrate, respectively, through holes provided to penetrate the core substrate and filled with resin filler, the interlayer resin insulating layers and conductor circuits provided. The resin filler contains an epoxy resin, a curing agent and 10 to 50% of inorganic particles.Type: ApplicationFiled: September 15, 2009Publication date: January 14, 2010Applicant: IBIDEN CO., LTD.Inventors: Yogo KAWASAKI, Hiroaki SATAKE, Yutaka IWATA, Tetsuya TANABE
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Publication number: 20080283282Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: ApplicationFiled: July 24, 2008Publication date: November 20, 2008Applicant: IBIDEN CO., LTD.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Publication number: 20080192879Abstract: A reactor start-up monitoring system, comprising: a determination apparatus for determining that moderator temperature reactivity coefficient is positive based on neutron flux measured by a neutron detector and a reactor water temperature measured by a temperature detection apparatus; an output information creating apparatus for creating first output information indicating positive moderator temperature reactivity coefficient when determination information inputted from the determination apparatus indicates the positive moderator temperature reactivity coefficient; and at least one of a display apparatus and an audio output apparatus for inputting the first output information.Type: ApplicationFiled: January 24, 2008Publication date: August 14, 2008Inventors: Yoshihiko Ishii, Hitoshi Ochi, Yutaka Iwata
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Patent number: 7178234Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: GrantFiled: April 15, 2005Date of Patent: February 20, 2007Assignee: Ibiden Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Publication number: 20060191708Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: ApplicationFiled: January 18, 2006Publication date: August 31, 2006Applicant: IBIDEN CO., LTD.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Publication number: 20050189136Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: ApplicationFiled: April 15, 2005Publication date: September 1, 2005Applicant: IBIDEN CO., LTD.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Patent number: 6930258Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.Type: GrantFiled: October 20, 2000Date of Patent: August 16, 2005Assignee: Ibiden Co., Ltd.Inventors: Yogo Kawasaki, Hiroaki Satake, Yutaka Iwata, Tetsuya Tanabe
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Patent number: 5512712Abstract: Improved printed wiring boards are disclosed, in which indications showing the types of electronic devices to be mounted on the printed wiring boards and other information are provided within the insulation cover coating and are protected from getting accidentally scraped off. Alignment marks are also well protected so that users can always rely on the alignment marks. The surfaces of the printed wiring boards are smooth and flat, which prevents stagnation trouble in a feeding operation of the printed wiring boards as well as helps provide a securer mounting of electronic devices. An improved wiring freedom is also provided.Type: GrantFiled: October 12, 1994Date of Patent: April 30, 1996Assignee: Ibiden Co., Ltd.Inventors: Yutaka Iwata, Ryo Enomoto, Akihito Nakamura, Akihiro Demura
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Patent number: 5450204Abstract: An inspecting device inspects the printed state of cream solder by projecting a plurality of light patterns varying in phase onto a printed circuit board printed with cream solder, and processing signals obtained by an image pick-up device for picking up the image on the surface of the printed circuit board using a phase shifting method. A printed position, area, thickness or amount of the cream solder can be detected. By comparing the data thus obtained with reference data, the printed state is evaluated. The printed state of the cream solder may be examined quickly and positively, while a continuous automatic processing can be effected without stopping the mounting process of the printed circuit board in a production line.Type: GrantFiled: March 26, 1993Date of Patent: September 12, 1995Assignee: Sharp Kabushiki KaishaInventors: Yoshihide Shigeyama, Nobuaki Kakimori, Yuichi Yamamoto, Yutaka Iwata, Kengo Nishigaki, Shin Kishimoto
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Patent number: 4281914Abstract: Rollers having attached thereto ribbons of a shutter screen of a focal plane shutter are arranged to have either another roller or a shutter screen take-up shaft fitted therein with a frictional force provided between them. The rollers are provided with an engaging part for engagement with an external member. The degree of parallelism between the slit forming ends of the front and rear screens of the shutter forming a slit for exposure is adjustable by operating the external member to rotate the rollers with a force greater than the frictional force.Type: GrantFiled: January 23, 1980Date of Patent: August 4, 1981Assignee: Canon Kabushiki KaishaInventors: Nobuo Tezuka, Teiji Hashimoto, Mitio Senuma, Yutaka Iwata
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Patent number: 4220874Abstract: The high frequency semiconductor device of the present comprises a pair of diodes and a transfer switch. The anode electrodes of the diodes are connected together and the transfer switch operates to connect the cathode electrode of one diode to ground and the cathode electrode of the other diode to a voltage source so as to forwardly bias one diode and reversely bias the other diode. By the selective operation of the transfer switch, the device operates either as a switch for passing high frequency signals or as an attenuator for high frequency signals.Type: GrantFiled: February 22, 1978Date of Patent: September 2, 1980Assignee: Oki Electric Industry Co., Ltd.Inventors: Yutaka Iwata, Seiichi Takahashi, Katsuzo Kaminishi
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Patent number: D742790Type: GrantFiled: October 24, 2014Date of Patent: November 10, 2015Assignee: MITSUBISHI JIDOSHA KOGYO KABUSHIKI KAISHAInventors: Hiroshi Noguchi, Toshihiro Imaeda, Yutaka Iwata