Patents by Inventor Yutaka Kadogawa
Yutaka Kadogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240048119Abstract: An acoustic wave device includes a resonator formed on one surface of a device chip; a support layer formed so as to surround the resonator on the one surface; a cover layer formed on the support layer and cooperating with the device chip and the support layer to form a cavity for hermetically sealing the resonator; and the cover layer on the one cavity is curved so that a forming side of the resonator is a curved inner side.Type: ApplicationFiled: August 7, 2023Publication date: February 8, 2024Applicant: Sanan Japan Technology CorporationInventors: Yutaka Kadogawa, Hirofumi Nakamura, Koichi Kumagai
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Publication number: 20230386922Abstract: A semiconductor device includes a semiconductor substrate, active elements, first insulating film, an electrode pad, and a Through Silicon VIA electrode. The semiconductor substrate has an obverse surface and a reverse surface. The active elements define an element-absence area free of any of the active elements. The element-absence area includes a second insulating film, a ring-shaped dummy portion, and island-shaped dummy portions. The ring-shaped dummy portion and the island-shaped dummy portions are made of the same material as the semiconductor substrate. The ring-shaped dummy portion and the island-shaped dummy portions have top surfaces coplanar with a top surface of the second insulating film. The Through Silicon VIA electrode penetrates between an inner edge and an outer edge of the ring-shaped dummy portion from the reverse surface to the obverse surface. Some island-shaped dummy portions are disposed inside of the inner edge of the ring-shaped dummy portion.Type: ApplicationFiled: July 28, 2023Publication date: November 30, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Osamu KOIKE, Yutaka KADOGAWA
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Patent number: 11798847Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: GrantFiled: December 10, 2020Date of Patent: October 24, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Osamu Koike, Yutaka Kadogawa
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Publication number: 20230059423Abstract: A module includes a package substrate, an elastic wave device mounted on the package substrate, the elastic wave device includes a first main surface having a functional element, the first main surface faces the package substrate, a semiconductor device mounted on the package substrate, and a resin made from a single material, the resin covers the elastic wave device while leaving an air gap between the package substrate and the functional element, and the resin covers the semiconductor device while filling a space between the package substrate and the semiconductor device.Type: ApplicationFiled: August 18, 2022Publication date: February 23, 2023Applicant: Sanan Japan Technology CorporationInventors: Hirofumi Nakamura, Koichi Kumagai, Yutaka Kadogawa, Kanehisa Kimbara
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Publication number: 20210098297Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: ApplicationFiled: December 10, 2020Publication date: April 1, 2021Applicant: LAPIS Semiconductor Co., Ltd.Inventors: Osamu KOIKE, Yutaka KADOGAWA
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Patent number: 10892189Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: GrantFiled: July 2, 2019Date of Patent: January 12, 2021Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Osamu Koike, Yutaka Kadogawa
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Publication number: 20190326173Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: ApplicationFiled: July 2, 2019Publication date: October 24, 2019Applicant: LAPIS Semiconductor Co., Ltd.Inventors: Osamu KOIKE, Yutaka KADOGAWA
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Publication number: 20180151434Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: ApplicationFiled: January 24, 2018Publication date: May 31, 2018Applicant: LAPIS Semiconductor Co., Ltd.Inventors: Osamu KOIKE, Yutaka KADOGAWA
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Patent number: 9892968Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: GrantFiled: July 8, 2009Date of Patent: February 13, 2018Assignee: LAPIS Semiconductor Co., Ltd.Inventors: Osamu Koike, Yutaka Kadogawa
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Patent number: 8115317Abstract: To improve connection reliability of a through electrode in a semiconductor device, and prevent deterioration of electrical characteristics due to a residue generated from a pad at the time of forming the through electrode. A contact area between a pad and a conductor layer is equal to a diameter of a hole of an opening provided in a silicon substrate. Consequently, it is possible to increase the contact area as compared with a conventional configuration. This improves the connection reliability. Furthermore, a residue containing metal is attached to the outside of an insulation film in the manufacturing process. Consequently, the residue is prevented from contacting a silicon substrate body. Also, heavy metals, such as Cu, in the residue are prevented from being diffused into the silicon substrate body. Therefore, it is possible to prevent the deterioration of electrical characteristics.Type: GrantFiled: May 29, 2009Date of Patent: February 14, 2012Assignee: Oki Semiconductor Co., Ltd.Inventors: Shigeru Yamada, Yutaka Kadogawa
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Patent number: 8008195Abstract: An insulator layer is formed on a part of semiconductor substrate to form an isolation layer that insulates and separates active elements from each other in the first region, and to form a dummy portion which is composed of a base material of the semiconductor substrate exposed in the insulator layer in a second region. Active elements are formed in the first region. A silicide layer is formed on the first and second regions excluding at least a portion in which the TSV electrode should be formed. At least one TSV hole extending from a reverse surface side of the semiconductor substrate to an electrode pad via the second region is formed. A conductive film is formed on the inner wall of the TSV hole to form a TSV electrode electrically connected to the electrode pad.Type: GrantFiled: January 22, 2010Date of Patent: August 30, 2011Assignee: Oki Semiconductor Co., Ltd.Inventors: Osamu Koike, Yutaka Kadogawa
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Publication number: 20100190338Abstract: An insulator layer is formed on a part of semiconductor substrate to form an isolation layer that insulates and separates active elements from each other in the first region, and to form a dummy portion which is composed of a base material of the semiconductor substrate exposed in the insulator layer in a second region. Active elements are formed in the first region. A silicide layer is formed on the first and second regions excluding at least a portion in which the TSV electrode should be formed. At least one TSV hole extending from a reverse surface side of the semiconductor substrate to an electrode pad via the second region is formed. A conductive film is formed on the inner wall of the TSV hole to form a TSV electrode electrically connected to the electrode pad.Type: ApplicationFiled: January 22, 2010Publication date: July 29, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventors: Osamu Koike, Yutaka Kadogawa
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Publication number: 20100007030Abstract: There is provided a semiconductor device comprising a semiconductor substrate having an active area in which a plurality of active elements are formed, and a non-active area excepting the active area; at least one electrode pad electrically connected to any of the active elements. At least one Through Silicon VIA electrode is formed, being electrically connected to the electrode pad by way of the non-active area. The non-active area has an insulating region obtained by forming an insulating film on the semiconductor substrate, and a dummy section obtained by leaving a base material of the semiconductor substrate in the insulating region. The dummy section is provided in a position where an outer edge of the Through Silicon VIA electrode does not intersect with the boundary between the insulating region and the dummy section.Type: ApplicationFiled: July 8, 2009Publication date: January 14, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventors: Osamu Koike, Yutaka Kadogawa
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Publication number: 20090294987Abstract: To improve connection reliability of a through electrode in a semiconductor device, and prevent deterioration of electrical characteristics due to a residue generated from a pad at the time of forming the through electrode. A contact area between a pad 21-1 and a conductor layer 27 is equal to a diameter f2 of a hole of an opening 26 provided in a silicon substrate 20. Consequently, it is possible to increase the contact area as compared with a conventional configuration. This improves the connection reliability. Furthermore, a residue containing metal (pad 21-1) is attached to the outside of an insulation film 25 in the manufacturing process. Consequently, the residue is prevented from contacting a silicon substrate body 20c. Also, heavy metals, such as Cu, in the residue are prevented from being diffused into the silicon substrate body 20c. Therefore, it is possible to prevent the deterioration of electrical characteristics.Type: ApplicationFiled: May 29, 2009Publication date: December 3, 2009Applicant: OKI SEMICONDUCTOR CO., LTD.Inventors: Shigeru Yamada, Yutaka Kadogawa
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Patent number: 7057792Abstract: An optical sensor unit, free from electrical noise, includes a sensor case which has both lateral sides having high frequency connectors mounted thereon, and a metallic plate mounted inside the case. The metallic plate has both ends connected to inner conductors of the high frequency connectors, and its upper surface having a current and a voltage sensor unit mounted thereon for measuring the high frequency current and voltage, respectively. The current sensor unit includes total-reflection mirrors and a current sensor, and the voltage sensor unit includes further total-reflection mirrors and a voltage sensor. The voltage sensor has its upper surface having an electrode provided thereon to be connected to the sensor case. The laser light from outside is input to the current and voltage sensor units over optical fibers. The signal light output from the current and voltage sensor units is taken outside on output optical fibers.Type: GrantFiled: June 12, 2003Date of Patent: June 6, 2006Assignees: Oki Electric Industry Co., Ltd., Miyazaki Oki Electric Co., Ltd., Shimadzu Corporation, Tadamitsu KanekoInventors: Yutaka Kadogawa, Naoji Moriya, Toshinori Tsuji
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Publication number: 20040041083Abstract: An optical sensor unit, free from electrical noise, includes a sensor case which has both lateral sides having high frequency connectors mounted thereon, and a metallic plate mounted inside the case. The metallic plate has both ends connected to inner conductors of the high frequency connectors, and its upper surface having a current and a voltage sensor unit mounted thereon for measuring the high frequency current and voltage, respectively. The current sensor unit includes total-reflection mirrors and a current sensor, and the voltage sensor unit includes further total-reflection mirrors and a voltage sensor. The voltage sensor has its upper surface having an electrode provided thereon to be connected to the sensor case. The laser light from outside is input to the current and voltage sensor units over optical fibers. The signal light output from the current and voltage sensor units is taken outside on output optical fibers.Type: ApplicationFiled: June 12, 2003Publication date: March 4, 2004Inventors: Yutaka Kadogawa, Naoji Moriya, Toshinori Tsuji