Patents by Inventor Yutaka Kamata

Yutaka Kamata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10150410
    Abstract: An information providing system for a vehicle is provided. The vehicle is operable by a driver capable of exhibiting driving behavior, the driving behavior being a recorded frequency of occurrences. The system can include a processor that is configured to: obtain a first driving pattern from the driving behavior, the first driving pattern being specified when the same driving behavior is repeated above a threshold frequency; select at least one functionality based on the first driving pattern obtained; and recommend the at least one functionality selected by the selector to the driver.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: December 11, 2018
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Zeljko Medenica, Shigenobu Saigusa, Yutaka Kamata
  • Publication number: 20180170256
    Abstract: An information providing system for a vehicle is provided. The vehicle is operable by a driver capable of exhibiting driving behavior, the driving behavior being a recorded frequency of occurrences. The system can include a processor that is configured to: obtain a first driving pattern from the driving behavior, the first driving pattern being specified when the same driving behavior is repeated above a threshold frequency; select at least one functionality based on the first driving pattern obtained; and recommend the at least one functionality selected by the selector to the driver.
    Type: Application
    Filed: December 21, 2016
    Publication date: June 21, 2018
    Inventors: Zeljko MEDENICA, Shigenobu SAIGUSA, Yutaka KAMATA
  • Patent number: 8649966
    Abstract: A drive support system can provide drive support information on traveling of an own vehicle with respect to another vehicle based on positional information. The drive support system can include a drive support level determination part which changes the degree of offer of the drive support information in a stepwise manner corresponding to a traveling area of the own vehicle. An error occurrence area memory part stores an area where an error in the positional information meets or exceeds a predetermined level in advance along with map information. A degree of offer of the drive support information is limited when the own vehicle is present within an area where an error in the positional information meets or exceeds a predetermined level.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: February 11, 2014
    Assignee: Honda Motor Co., Ltd
    Inventors: Yutaka Kamata, Kazumitsu Kushida
  • Publication number: 20120200427
    Abstract: A driving support apparatus for a first vehicle in which a driving support system carries out, when a second vehicle exists in a communication area of the first vehicle, transmission and reception of position information between the first vehicle and the second vehicle and provides driving support information of traveling relating to a risk of the first vehicle with regard to the second vehicle based on the position information, the driving support apparatus for a first vehicle including a display unit for displaying the driving support information; and a display controller for controlling a display mode of the display unit based on a positional relationship between the first vehicle and the second vehicle; the display unit includes: a first display for displaying the driving support information when the second vehicle exists at a position ahead of the first vehicle.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Applicant: HONDA MOTOR CO., LTD
    Inventor: Yutaka Kamata
  • Publication number: 20120083999
    Abstract: A drive support system can provide drive support information on traveling of an own vehicle with respect to another vehicle based on positional information. The drive support system can include a drive support level determination part which changes the degree of offer of the drive support information in a stepwise manner corresponding to a traveling area of the own vehicle. An error occurrence area memory part stores an area where an error in the positional information meets or exceeds a predetermined level in advance along with map information. A degree of offer of the drive support information is limited when the own vehicle is present within an area where an error in the positional information meets or exceeds a predetermined level.
    Type: Application
    Filed: September 22, 2011
    Publication date: April 5, 2012
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Yutaka KAMATA, Kazumitsu KUSHIDA
  • Patent number: 7266444
    Abstract: A driver load measuring method, device, and program, and a storage medium for storing the program for accurately measuring a load on a driver driving a vehicle accompanied by attitude changes.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: September 4, 2007
    Assignee: Honda Motor Co., Ltd.
    Inventors: Mutsumi Katayama, Yutaka Kamata
  • Patent number: 7199030
    Abstract: An impurity is ion-implanted with a silicon nitride film formed on a silicon substrate as a mask film to form a source/drain layer of a MOS transistor. Heat treatment for activating the impurity is done as it is without removing the silicon nitride film to thereby produce heat treatment-based stress between the silicon nitride film and the silicon substrate.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: April 3, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Satoshi Ikeda, Yutaka Kamata, Ikuo Kurachi, Norio Hirashita
  • Patent number: 7022614
    Abstract: A resist pattern is formed at an outermost peripheral end of the surface of a wafer. Thereafter, the back of the wafer is back-etched using chemicals to thin the wafer. A passivation film is left behind only at scribe lines for separating semiconductor chips located at the outermost peripheral end of the wafer surface and thereafter the wafer is back-etched.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: April 4, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Akira Uchiyama, Yutaka Kamata
  • Publication number: 20060069498
    Abstract: A driver load measuring method, device, and program, and a storage medium for storing the program for accurately measuring a load on a driver driving a vehicle accompanied by attitude changes.
    Type: Application
    Filed: September 19, 2005
    Publication date: March 30, 2006
    Inventors: Mutsumi Katayama, Yutaka Kamata
  • Publication number: 20040067626
    Abstract: An impurity is ion-implanted with a silicon nitride film formed on a silicon substrate as a mask film to form a source/drain layer of a MOS transistor. Heat treatment for activating the impurity is done as it is without removing the silicon nitride film to thereby produce heat treatment-based stress between the silicon nitride film and the silicon substrate.
    Type: Application
    Filed: May 28, 2003
    Publication date: April 8, 2004
    Inventors: Satoshi Ikeda, Yutaka Kamata, Ikuo Kurachi, Norio Hirashita
  • Publication number: 20030199164
    Abstract: A resist pattern is formed at an outermost peripheral end of the surface of a wafer. Thereafter, the back of the wafer is back-etched using chemicals to thin the wafer. A passivation film is left behind only at scribe lines for separating semiconductor chips located at the outermost peripheral end of the wafer surface and thereafter the wafer is back-etched.
    Type: Application
    Filed: September 30, 2002
    Publication date: October 23, 2003
    Inventors: Akira Uchiyama, Yutaka Kamata
  • Patent number: 6180455
    Abstract: An object of the present invention is to manufacture a semiconductor device excellent in withstand-voltage property of each element formed in a peripheral element region portion, without incurring complexity of a manufacturing process. Impurity ions are injected into a substrate so as to form a first well portion and field oxide films for partitioning a substrate surface including the surface of the first well portion into a plurality of active regions. Further, the impurity ions are injected into the first well portion so as to form a second well portion having a plurality of active regions. Regions corresponding to the active regions on the second well portion are exposed and a mask for covering regions other than the above regions is formed. Ions are injected into the second well portion exposed from the mask under the action of energy transmitted through the field oxide films.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: January 30, 2001
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yutaka Kamata
  • Patent number: 6124623
    Abstract: An object of the present invention is to manufacture a semiconductor device excellent in withstand-voltage property of each element formed in a peripheral element region portion, without incurring complexity of a manufacturing process.Impurity ions are injected into a substrate so as to form a first well portion and field oxide films for partitioning a substrate surface including the surface of the first well portion into a plurality of active regions. Further, the impurity ions are injected into the first well portion so as to form a second well portion having a plurality of active regions. Regions corresponding to the active regions on the second well portion are exposed and a mask for covering regions other than the above regions is formed. Ions are injected into the second well portion exposed from the mask under the action of energy transmitted through the field oxide films.
    Type: Grant
    Filed: May 5, 1997
    Date of Patent: September 26, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yutaka Kamata
  • Patent number: 5059808
    Abstract: There is disclosed an alignment method comprising the steps of irradiating an alignment light toward an alignment mark whose surface has a high reflectance, the alignment mark being coated by a resist film, and performing alignment on the basis of the resultant intensity of reflected light from the surface of the resist and reflected light from an interface between the resist and the mark portion. The resist comprises a chemical material having a light absorption characteristic in a wavelength band of the alignment light, and is irrespective of that of an exposure light used to expose the resist.
    Type: Grant
    Filed: July 3, 1990
    Date of Patent: October 22, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Tarui, Kazuhiko Urayama, Yutaka Kamata
  • Patent number: 4714668
    Abstract: A method for patterning a layer having a high reflectance includes directly forming on a layer having a high reflectance a light-absorbing film having a ratio of transmitted light intensity to exposing incident light intensity of not more than 30% and forming a photosensitive material film on the light-absorbing film. A selected region of the photosensitive material film is irradiated with the exposing incident light, and the photosensitive material film is developed to form a first pattern. The light-absorbing film is selectively etched using the first pattern as a mask so as to form a second pattern. Finally, the layer having the high reflectance is selectively etched using the second pattern as a mask.
    Type: Grant
    Filed: June 24, 1986
    Date of Patent: December 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Tsunehisa Uneno, Yutaka Kamata, Sinji Miyazaki