Abstract: An image coding device including a dividing circuit for dividing an input image signal into a plurality of image areas, a coding method deciding circuit for deciding a coding method for a target one of the image areas, a binary image coder for coding a binary image in the target image area to obtain a binary image code, a nonbinary image coder for coding a nonbinary image in the target image area to obtain a nonbinary image code, a character/background separating circuit for separating a character/background synthesized image in the target image area into a character portion and a background portion and supplying the character portion and the background portion to the binary image coder and the nonbinary image coder, respectively, and a control circuit for selectively operating the binary image coder and the nonbinary image coder according to a decision result from the coding method deciding circuit.

Abstract: An image information processing device for performing two-dimensional encoding and decoding processings comprises an image data buffer memory, an image/run-length converting circuit, two run-length buffers, an encoding/decoding line shift-point address generating circuit, a reference line shift-point address generating circuit, pipeline-connected a.sub.2, a.sub.1 and a.sub.0 registers, pipeline connected b.sub.2, b.sub.1 and b.sub.0 registers, a mode/run-length detecting logic circuit, a control circuit, and a code word assigning/detecting circuit. Each of the two run-length buffers may consist of a first-in-first-out circuit.