Patents by Inventor Yutaka Mihashi
Yutaka Mihashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7675954Abstract: A semiconductor laser device includes: an electrically insulating film on the top face of a laser chip; and a metal film, on the electrically insulating film. The electrically insulating film and/or the metal film has, in plan, a polygonal shape with five or more apexes, each of the apexes having an interior angle less than 180 degrees. Stress due to a change of temperature during operation is reduced, resulting in a semiconductor laser device having a longer life and higher reliability.Type: GrantFiled: June 6, 2005Date of Patent: March 9, 2010Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tomoko Kadowaki, Tohru Takiguchi, Toshio Tanaka, Yutaka Mihashi
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Patent number: 7187701Abstract: A ridge waveguide semiconductor laser includes an active layer, semiconductor layers on the active layer and having a ridge-shaped waveguide, an insulating film on the semiconductor layer, a first electrode layer in contact with the semiconductor layer through an opening in the insulating film, and a second electrode layer on the first electrode layer having a stripe shape and extending along the waveguide. A distance from an end face of a resonator of the laser to an edge of the second electrode layer does not exceed 20 ?m.Type: GrantFiled: March 15, 2004Date of Patent: March 6, 2007Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yutaka Mihashi, Tohru Takiguchi, Toshio Tanaka, Tomoko Kadowaki, Yoshihiko Hanamaki, Nobuyuki Tomita
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Publication number: 20060018358Abstract: A semiconductor laser device includes: an electrically insulating film, on the top face of a laser chip; and a metal film, on the electrically insulating film. The electrically insulating film and/or the metal film has, in plan, a polygonal shave with five or more apexes, each of the apexes having an interior angle less than 180 degrees. Stress due to a change of temperature during operation is reduced, resulting in a semiconductor laser device having a longer life and higher reliability.Type: ApplicationFiled: June 6, 2005Publication date: January 26, 2006Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Tomoko Kadowaki, Tohru Takiguchi, Toshio Tanaka, Yutaka Mihashi
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Publication number: 20040218646Abstract: A ridge waveguide semiconductor laser includes an active layer, semiconductor layers on the active layer and having a ridge-shaped waveguide, an insulating film on the semiconductor layer, a first electrode layer in contact with the semiconductor layer through an opening in the insulating film, and a second electrode layer on the first electrode layer having a stripe shape and extending along the waveguide. A distance from an end face of a resonator of the laser to an edge of the second electrode layer does not exceed 20 &mgr;m.Type: ApplicationFiled: March 15, 2004Publication date: November 4, 2004Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Yutaka Mihashi, Tohru Takiguchi, Toshio Tanaka, Tomoko Kadowaki, Yoshihiko Hanamaki, Nobuyuki Tomita
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Patent number: 6768760Abstract: A laser device includes a double hetero-structure element constructed by depositing a p-type cladding layer, a quantum well active layer, an n-type thin first cladding layer and an n-type thick second cladding layer sequentially. A ridge-waveguide is shaped between two trenches formed in the second cladding layer. The first cladding layer serves as an etching stopper while etching the second cladding layer to form the two trenches. The trenches reach to or reach in vicinity to the surface of the first cladding layer. High-resistance regions may be formed in portions of the first cladding layer directly underneath the trenches. The thin first cladding layer, suppresses leakage current and improves the temperature characteristics and the operating speed characteristics of the laser device.Type: GrantFiled: October 1, 2002Date of Patent: July 27, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yutaka Mihashi, Tohru Takiguchi, Yoshihiko Hanamaki
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Publication number: 20030179794Abstract: A laser device includes a double hetero-structure element constructed by depositing a p-type cladding layer, a quantum well active layer, an n-type thin first cladding layer and an n-type thick second cladding layer sequentially. A ridge-waveguide is shaped between two trenches formed in the second cladding layer. The first cladding layer serves as an etching stopper while etching the second cladding layer to form the two trenches. The trenches reach to or reach in vicinity to the surface of the first cladding layer. High-resistance regions may be formed in portions of the first cladding layer directly underneath the trenches. The thin first cladding layer, suppresses leakage current and improves the temperature characteristics and the operating speed characteristics of the laser device.Type: ApplicationFiled: October 1, 2002Publication date: September 25, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Yutaka Mihashi, Tohru Takiguchi, Yoshihiko Hanamaki
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Patent number: 6275515Abstract: A semiconductor laser device on a GaAs substrate and having an oscillation wavelength of 1.3 &mgr;m or 1.55 &mgr;m and a method of producing the laser device. The laser device has a BTlGaAs active layer that lattice matches with the GaAs substrate. To grow the BTlGaAs active layer, organometallic vapor phase deposition is employed with cyclopentadienyl thallium as the source of Tl.Type: GrantFiled: January 28, 1999Date of Patent: August 14, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yutaka Nagai, Yutaka Mihashi, Motoharu Miyashita, Yasutomo Kajikawa
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Patent number: 6018539Abstract: A semiconductor laser includes a first conductivity type semiconductor substrate having a gain region and a spot size changing region adjacent each other; a first conductivity type lower cladding layer disposed on the substrate; an active layer disposed on the lower cladding layer and having a thickness which is uniform in the gain region and gradually decreases in the spot size changing region with distance from the gain region; a second conductivity type upper cladding layer disposed on the active layer and having a stripe-shaped ridge, the ridge extending along the gain region and the spot size changing region; a first electrode disposed on the ridge of the upper cladding layer; and a second electrode disposed on a rear surface of the substrate. Current flow is concentrated in the ridge of the upper cladding layer.Type: GrantFiled: February 9, 1998Date of Patent: January 25, 2000Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tatsuya Kimura, Motohalu Miyashita, Yutaka Mihashi
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Patent number: 5880485Abstract: A high-quality gallium nitride layer is grown on a surface of a substrate which is exposed through a dielectric mask on the substrate. The high-quality gallium nitride layer has a composition expressed by the chemical formula:Ga.sub.x Al.sub.y In.sub.z N (I)wherein 0<x.ltoreq.1, 0.ltoreq.y<1, 0.ltoreq.z<1, and x+y+z=1. An aluminum nitride thin layer is interposed between neighboring pairs of gallium nitride selectively grown layers and has a composition expressed by the following chemical formula:Al.sub.x Ga.sub.1-x N (II)wherein 0.7<x.ltoreq.1.Type: GrantFiled: September 11, 1997Date of Patent: March 9, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Diethard Marx, Zempei Kawazu, Yutaka Mihashi
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Patent number: 5838704Abstract: A pulsation laser includes an n-type AlGaAs cladding layer on an n-type GaAs substrate, three quantum well active layers having central increased thickness regions and disposed on the cladding layer, and a p-type AlGaAs cladding layer disposed on the quantum well active layer. The increased thickness region of the active layer is not more than one-quarter of the length of the resonator of the laser.Type: GrantFiled: May 17, 1996Date of Patent: November 17, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yutaka Mihashi, Motoharu Miyashita, Shoichi Karakida
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Patent number: 5835516Abstract: A method of fabricating a semiconductor laser device includes successively forming an active layer and upper cladding layers on a lower cladding layer, etching and removing portions except regions of the upper cladding layers where a current is to flow to form a stripe-shaped ridge structure, and forming a buffer layer comprising Al.sub.x Ga.sub.1-x As having an Al composition ratio x of 0 to 0.3 on a surface of the upper cladding layers exposed by the etching and forming a current blocking layer of first conductivity type Al.sub.y Ga.sub.1-y As having an Al composition ratio y of at least 0.5 on the buffer layer to bury portions of the upper cladding layers which are not removed by the etching process. Therefore, since the layer grown on the upper cladding layer exposed by etching of AlGaAs or GaAs having a low Al composition ratio (0-0.3), three-dimensional growth of and crystalline defects in the buffer layer are suppressed.Type: GrantFiled: December 8, 1995Date of Patent: November 10, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Motoharu Miyashita, Hirotaka Kizuki, Yasuaki Yoshida, Yutaka Mihashi, Yasutomo Kajikawa, Shoichi Karakida, Yuji Ohkura
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Patent number: 5763287Abstract: A method of making a semiconductor optical device, including an integrated laser diode and optical waveguide lens with a continuous resonator extending along a resonator length direction between a pair of resonator facets, includes forming a pair of dielectric films disposed on a surface of a substrate on which a semiconductor layer of the optical waveguide is to be grown, the dielectric films having a linear symmetry about a hypothetical line extending in the resonator length direction, having edges opposing each other and parallel to the hypothetical line, and widths perpendicular to the resonator length direction that gradually narrow toward one facet from a position in the resonator length direction of the films. A mask pattern that produces a precise layer thickness profile is easily designed.Type: GrantFiled: January 29, 1996Date of Patent: June 9, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takushi Itagaki, Tohru Takiguchi, Yutaka Mihashi, Akira Takemoto
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Patent number: 5684823Abstract: A quantum wire structure includes a substrate of a first semiconductor having a surface and a first band gap energy; a layer of a second semiconductor having a second band gap energy and including second semiconductor elements disposed on the surface of the substrate spaced apart in a pattern at an interval of no more than 100 nm, each second semiconductor element having a trapezoidal cross-section transverse to the surface of the substrate and including an upper surface generally parallel to the surface of the semiconductor substrate and sloped surfaces oriented so that a third semiconductor does not grow on the sloped surfaces; a layer of a third semiconductor having a third band gap energy smaller than the first and second band gap energies disposed on the upper surfaces of the second semiconductor elements and on the surface of the substrate between adjacent second semiconductor elements but not on the sloped surfaces; and a layer of a fourth semiconductor having a fourth band gap energy larger than the tType: GrantFiled: March 7, 1996Date of Patent: November 4, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Katsuhiko Goto, Yutaka Mihashi
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Patent number: 5675601Abstract: A semiconductor laser device includes, on a first conductivity type GaAs substrate, successively, a first conductivity type GaAs buffer layer, a first conductivity type Al.sub.s Ga.sub.1-s As (0<s<1) cladding layer, a quantum well active layer having a structure that can produce an oscillation wavelength of 0.9.about.1.2 .mu.m and including a well layer comprising In.sub.x Ga.sub.1-x As (0<x<1) and a barrier layer comprising Al.sub.y Ga.sub.1-y As (0<y<s), a second conductivity type Al.sub.t Ga.sub.1-t As (1<t<y) upper cladding layer, a second conductivity type GaAs contact layer, and a multiple reflection film layer alternatingly laminating first and second semiconductor materials which have the same conductivity type as the adjacent semiconductor materials and have the different refractive indices in number of layers, first and second electrodes, and a pair of laser resonator facets perpendicular to the active layer and the multiple reflection film layer.Type: GrantFiled: January 11, 1996Date of Patent: October 7, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Shoichi Karakida, Motoharu Miyashita, Yutaka Mihashi
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Patent number: 5518955Abstract: A method of fabricating a quantum wire structure includes forming a first insulating film on a surface of a substrate of a first semiconductor, the insulating film including a pattern of spaced apart mask elements having a width not exceeding 100 nm; selectively growing a layer of a second semiconductor on the surface of the substrate employing the insulating film as a growth mask, the layer including spaced apart second semiconductor elements, each second semiconductor element having a trapezoidal cross-section transverse to the surface of the substrate and including an upper surface generally parallel to the surface of the substrate and sloped surfaces oriented so that a third semiconductor does not grow on the sloped surfaces; growing a layer of a third semiconductor having a smaller band gap energy than the band gap energies of the first and second semiconductors on the upper surfaces of the second semiconductor elements and on the surface of the substrate between adjacent second semiconductor elements buType: GrantFiled: February 7, 1995Date of Patent: May 21, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Katsuhiko Goto, Yutaka Mihashi
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Patent number: 5439723Abstract: A semiconductor wafer includes a notch or a hole used in preparing an orientation flat on the wafer. The notch in the wafer includes a side that is perpendicular to the surfaces of the wafer and aligned along a cleavage plane of the wafer for forming the orientation flat by cleaving. A hole in a wafer preferably includes an axis aligned along the cleaving plane. A sharp, non-rounded cleavage is formed by preparing the notch or hole after the completion of any etching processes or other steps that may round the edges of the flat. The sharp edges aid in achieving a precision alignment using the orientation flat.Type: GrantFiled: November 12, 1993Date of Patent: August 8, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Motoharu Miyashita, Norio Hayafuji, Yutaka Mihashi
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Patent number: 5436195Abstract: In a method of fabricating an integrated semiconductor light modulator and laser device, a semiconductor layer having first and second regions of different crystal compositions is produced on each chip region of a semiconductor wafer by a selective crystal growth using, as a mask, a dielectric film having a prescribed pattern. Thereafter, a semiconductor laser and a light modulator that modulates laser light emitted from the semiconductor layer are produced in a first semiconductor region and a second semiconductor region, respectively, of each chip region. In this method, the shape of the dielectric mask pattern and the shape of the opening of the mask pattern on each chip region is symmetrical with the dielectric mask pattern and opening of an adjacent chip region along the optical waveguide direction of the semiconductor laser.Type: GrantFiled: August 18, 1994Date of Patent: July 25, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tadashi Kimura, Yutaka Mihashi, Katuhiko Goto, Takushi Itagaki
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Patent number: 5311046Abstract: A long wavelength transmitter OEIC includes a transverse direction current injection type semiconductor laser and a high electron mobility transistor which are integrated on a semi-insulating substrate. The semiconductor laser includes at least an AlGaInAs lower cladding layer, a quantum well active layer and a high resistivity AlGaInAs upper cladding layer successively grown on the semi-insulating substrate, disordered regions formed in the quantum well active layer by diffusions of p type and n type dopants, and an active region sandwiched by the disordered regions. The transistor includes an operating layer and a carrier supplying layer both including AlGaInAs series material and formed on the high resistivity AlGaInAs upper cladding layer. This transistor uses the upper cladding layer as a leakage current preventing layer. This structure can be formed by only one epitaxial growth, resulting in low cost.Type: GrantFiled: September 11, 1991Date of Patent: May 10, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yutaka Mihashi
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Patent number: 5279077Abstract: In a method for forming a semiconductor wafer with an orientation flat along a cleavage plane, a groove or hole is formed in the substrate on a line along which the substrate is cleaved to form an orientation flat and the substrate is treated to produce a mirrorlike surface. Then, the substrate having the mirrorlike surface is cleaved from the groove or hole to form the orientation flat. Accordingly, edges of the cleavage plane are not rounded due to the surface treatment. In addition, the substrate is easily cleaved along the cleavage plane from the groove or the hole. As a result, a semiconductor wafer having a sharp cleavage plane as an orientation flat is produced with improved yield, and alignment is performed with high precision in a subsequent process, such as photolithography.Type: GrantFiled: November 16, 1992Date of Patent: January 18, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Motoharu Miyashita, Norio Hayafuji, Yutaka Mihashi
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Patent number: 5218614Abstract: A semiconductor laser device has a thyristor current confinement structure at both sides of an active region. A p-n junction in the current confinement structure is forward biased during laser operation and is short-circuited by a metal layer or a low resistance material layer. Therefore, injection of holes from the p layer into the n layer of the short-circuited junction during laser operation is suppressed whereby the thyristor current confinement structure is not likely to be turned on. In addition, the current flowing through the blocking layer is decreased. As a result, current blocking is significantly improved, preventing a reduction in the laser output power and a reduction in the linearity of the light output versus current characteristic of the laser.Type: GrantFiled: March 26, 1992Date of Patent: June 8, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yutaka Mihashi