Patents by Inventor Yutaka Nakadai

Yutaka Nakadai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10664370
    Abstract: Related semiconductor devices have a problem in which analysis processing with high defect reproducibility cannot be performed. According to an embodiment, a semiconductor device includes a first arithmetic core that executes a first program stored in a first code area using a first local memory area and a second arithmetic core that executes a second program stored in a second code area using a second local memory area. In an analysis mode, the semiconductor device performs first analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the first program and second analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the second program, and compares a plurality of arithmetic result data pieces acquired from the first and second analysis processing to thereby acquire analysis information used for defect analysis.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: May 26, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenji Shiozawa, Yoshihide Nakamura, Takuya Lee, Yutaka Nakadai, Tetsuya Kokubun, Hiroyuki Sasaki
  • Patent number: 10656201
    Abstract: According to one embodiment, a semiconductor device performs processing based on a user program by using a user program, which is used in a normal mode, as an analysis program and making a plurality of peripheral circuits having the same function operate in lock-step where the plurality of peripheral circuits operate in the identical manner, and makes failure diagnosis of the peripheral circuits by determining match or mismatch of a plurality of analysis information respectively obtained from the plurality of peripheral circuits operating in lock-step.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: May 19, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takuya Lee, Tetsuya Kokubun, Yutaka Nakadai, Kenji Shiozawa, Yoshihide Nakamura
  • Publication number: 20190004914
    Abstract: Related semiconductor devices have a problem in which analysis processing with high defect reproducibility cannot be performed. According to an embodiment, a semiconductor device includes a first arithmetic core that executes a first program stored in a first code area using a first local memory area and a second arithmetic core that executes a second program stored in a second code area using a second local memory area. In an analysis mode, the semiconductor device performs first analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the first program and second analysis processing that causes both the first arithmetic core and the second arithmetic core to execute the second program, and compares a plurality of arithmetic result data pieces acquired from the first and second analysis processing to thereby acquire analysis information used for defect analysis.
    Type: Application
    Filed: May 2, 2018
    Publication date: January 3, 2019
    Inventors: Kenji SHIOZAWA, Yoshihide NAKAMURA, Takuya LEE, Yutaka NAKADAI, Tetsuya KOKUBUN, Hiroyuki SASAKI
  • Publication number: 20190004110
    Abstract: According to one embodiment, a semiconductor device performs processing based on a user program by using a user program, which is used in a normal mode, as an analysis program and making a plurality of peripheral circuits having the same function operate in lock-step where the plurality of peripheral circuits operate in the identical manner, and makes failure diagnosis of the peripheral circuits by determining match or mismatch of a plurality of analysis information respectively obtained from the plurality of peripheral circuits operating in lock-step.
    Type: Application
    Filed: May 3, 2018
    Publication date: January 3, 2019
    Inventors: Takuya LEE, Tetsuya KOKUBUN, Yutaka NAKADAI, Kenji SHIOZAWA, Yoshihide NAKAMURA
  • Publication number: 20180364297
    Abstract: A semiconductor device includes a bus, first and second bus drivers that drive the bus, and a control circuit that controls the first and second bus drivers. The control circuit controls the first and second bus drivers in such a way that the first and second bus drivers supply logic signals different from each other to the bus.
    Type: Application
    Filed: June 12, 2018
    Publication date: December 20, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Yoshihide NAKAMURA, Kenji SHIOZAWA, Tetsuya KOKUBUN, Yutaka NAKADAI, Takuya LEE
  • Publication number: 20080088366
    Abstract: The present invention is directed to shorten time required to establish a connection and enable information to be actually transmitted/received in a noncontact IC card adaptable to a plurality of communication methods. A semiconductor integrated circuit device of the invention includes: a single demodulating circuit capable of demodulating an input signal; a plurality of sampling circuits each capable of sampling output signals of the demodulating circuit synchronously with a predetermined clock signal; a plurality of detection circuits capable of detecting headers of output signals of the corresponding sampling circuits; a plurality of processing circuits capable of performing a predetermined data process on the basis of detection results of the corresponding detection circuits; and a communication method determining circuit capable of determining a match to a preset communication method from results of the header detection by the plurality of detection circuits.
    Type: Application
    Filed: December 5, 2007
    Publication date: April 17, 2008
    Inventors: Yutaka NAKADAI, Yasuyoshi Nakajima, Norihisa Yamamoto, Toshiaki Shibata
  • Patent number: 7357330
    Abstract: A semiconductor integrated circuit device (IC) and a contactless IC card including a receiver circuit that is able to stably demodulate information signals superimposed on AC signals from an interrogator. The receiver circuit included in the IC is equipped with antenna terminals, a power supply circuit, and a filter circuit. The information signal from which a high frequency component was eliminated through the filter circuit is input via a capacitor to an inverting input terminal of an operational amplifier and a reference voltage is input to a non-inverting input terminal thereof. After the information signal is fed back through a feedback path to the non-inverting input terminal of the operational amplifier, that signal is amplified and the amplified information signal is binarised by a binarising circuit, thereby data transmitted from the interrogator is demodulated. The contactless IC card comprises an antenna coil and the IC including this receiver circuit.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: April 15, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kazuki Watanabe, Yutaka Nakadai, Shinichi Ozawa
  • Patent number: 7309018
    Abstract: A semiconductor integrated circuit includes a demodulating circuit, a plurality of sampling circuits each capable of sampling output signals of the demodulating circuit, a plurality of detection circuits capable of detecting headers of output signals of the sampling circuits, a plurality of processing circuits capable of performing a predetermined data process based on the detection results of the detection circuits, and a circuit capable of determining a match to a preset communication method from results of the header detection by the detection circuits. By performing processes adapted to different communication methods in parallel, time required to establish a connection and enable information to be transmitted/received is reduced.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: December 18, 2007
    Assignees: Renesas Technology Corp., Hitachi Hybrid Network Co., Ltd.
    Inventors: Yutaka Nakadai, Yasuyoshi Nakajima, Norihisa Yamamoto, Toshiaki Shibata
  • Publication number: 20060202043
    Abstract: A semiconductor integrated circuit device (IC) and a contactless IC card including a receiver circuit that is able to stably demodulate information signals superimposed on AC signals from an interrogator. The receiver circuit included in the IC is equipped with antenna terminals, a power supply circuit, and a filter circuit. The information signal from which a high frequency component was eliminated through the filter circuit is input via a capacitor to an inverting input terminal of an operational amplifier and a reference voltage is input to a non-inverting input terminal thereof. After the information signal is fed back through a feedback path to the non-inverting input terminal of the operational amplifier, that signal is amplified and the amplified information signal is binarized by a binarizing circuit, thereby data transmitted from the interrogator is demodulated. The contactless IC card comprises an antenna coil and the IC including this receiver circuit.
    Type: Application
    Filed: May 12, 2006
    Publication date: September 14, 2006
    Inventors: Kazuki Watanabe, Yutaka Nakadai, Shinichi Ozawa
  • Patent number: 7044393
    Abstract: A semiconductor integrated circuit device (IC) and a contactless IC card including a receiver circuit that is able to stably demodulate information signals superimposed on AC signals from an interrogator. The receiver circuit included in the IC is equipped with antenna terminals, a power supply circuit, and a filter circuit. The information signal from which a high frequency component was eliminated through the filter circuit is input via a capacitor to an inverting input terminal of an operational amplifier and a reference voltage is input to a non-inverting input terminal thereof. After the information signal is fed back through a feedback path to the non-inverting input terminal of the operational amplifier, that signal is amplified and the amplified information signal is binarized by a binarizing circuit, thereby data transmitted from the interrogator is demodulated. The contactless IC card comprises an antenna coil and the IC including this receiver circuit.
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: May 16, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Kazuki Watanabe, Yutaka Nakadai, Shinichi Ozawa
  • Publication number: 20060038024
    Abstract: The present invention is directed to shorten time required to establish a connection and enable information to be actually transmitted/received in a noncontact IC card adaptable to a plurality of communication methods. A semiconductor integrated circuit device of the invention includes: a single demodulating circuit capable of demodulating an input signal; a plurality of sampling circuits each capable of sampling output signals of the demodulating circuit synchronously with a predetermined clock signal; a plurality of detection circuits capable of detecting headers of output signals of the corresponding sampling circuits; a plurality of processing circuits capable of performing a predetermined data process on the basis of detection results of the corresponding detection circuits; and a communication method determining circuit capable of determining a match to a preset communication method from results of the header detection by the plurality of detection circuits.
    Type: Application
    Filed: July 19, 2005
    Publication date: February 23, 2006
    Inventors: Yutaka Nakadai, Yasuyoshi Nakajima, Norihisa Yamamoto, Toshiaki Shibata
  • Publication number: 20050173542
    Abstract: The disclosed invention provides a semiconductor integrated circuit device (IC) and a contactless IC card including a receiver circuit that is able to stably demodulate information signals superimposed on AC signals from an interrogator. The receiver circuit included in the IC is equipped with antenna terminals, a power supply circuit, and a filter circuit. The information signal from which a high frequency component was eliminated through the filter circuit is input via a capacitor to an inverting input terminal of an operational amplifier and a reference voltage is input to a non-inverting input terminal thereof. After the information signal is fed back through a feedback path to the non-inverting input terminal of the operational amplifier, that signal is amplified and the amplified information signal is binarized by a binarizing circuit, thereby data transmitted from the interrogator is demodulated. The contactless IC card comprises an antenna coil and the IC including this receiver circuit.
    Type: Application
    Filed: January 4, 2005
    Publication date: August 11, 2005
    Inventors: Kazuki Watanabe, Yutaka Nakadai, Shinichi Ozawa