Abstract: The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.

Abstract: The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.

Abstract: The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.

Abstract: Provided is a semiconductor device including: a multilayer substrate including an optical element; a light-transmitting plate provided on the substrate to cover the optical element; and a lens of an inorganic material provided between the substrate and the light-transmitting plate. A structure having a same strength as a strength per unit area of the lens is provided at a portion outside an effective photosensitive region where the optical element is formed, when the substrate is viewed in plan.

Abstract: There is provided a solid-state imaging device including a substrate having a surface over which a plurality of photodiodes are formed, and a protection film that is transparent, has a water-proofing property, and includes a side wall part vertical to the surface of the substrate and a ceiling part covering a region surrounded by the side wall part, the side wall part and the ceiling part surrounding a region where the plurality of photodiodes are arranged over the substrate.

Abstract: The present technology relates to a semiconductor chip and an electronic apparatus that can suppress degradation of optical characteristics of a semiconductor chip including an image pickup device. A semiconductor chip includes: an image pickup device; a transparent protective member that protects the image pickup device; an IR cut film arranged between a light-receiving surface of the image pickup device and the protective member; a bonding layer that bonds the IR cut film and the protective member together; and a protective film that covers side surfaces of the IR cut film and the bonding layer. The present technology can be applied to, for example, a semiconductor chip for an image pickup device.

Abstract: The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.

Abstract: Provided is a semiconductor device including: a multilayer substrate including an optical element; a light-transmitting plate provided on the substrate to cover the optical element; and a lens of an inorganic material provided between the substrate and the light-transmitting plate. A structure having a same strength as a strength per unit area of the lens is provided at a portion outside an effective photosensitive region where the optical element is formed, when the substrate is viewed in plan.

Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.

Abstract: There is provided a solid-state imaging device including a substrate having a surface over which a plurality of photodiodes are formed, and a protection film that is transparent, has a water-proofing property, and includes a side wall part vertical to the surface of the substrate and a ceiling part covering a region surrounded by the side wall part, the side wall part and the ceiling part surrounding a region where the plurality of photodiodes are arranged over the substrate.

Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.

Abstract: A semiconductor device includes a first semiconductor substrate in which a pixel region where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate in which a logic circuit processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate protecting an on-chip lens is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin interposed therebetween.

Abstract: Picture quality deterioration is curbed. A solid-state imaging device according to an embodiment includes: a semiconductor substrate (131) including a light-receiving element; an on-chip lens (132) disposed on a first surface of the semiconductor substrate; a resin layer (133) covering the on-chip lens; and a glass substrate (134) disposed on the side of the first surface of the semiconductor substrate separately from the resin layer.

Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.

Abstract: The present technology relates to a semiconductor chip and an electronic apparatus that can suppress degradation of optical characteristics of a semiconductor chip including an image pickup device. A semiconductor chip includes: an image pickup device; a transparent protective member that protects the image pickup device; an IR cut film arranged between a light-receiving surface of the image pickup device and the protective member; a bonding layer that bonds the IR cut film and the protective member together; and a protective film that covers side surfaces of the IR cut film and the bonding layer. The present technology can be applied to, for example, a semiconductor chip for an image pickup device.

Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.

Abstract: An imaging element according to an embodiment of the present disclosure includes: a sensor substrate having a light-receiving region in which a plurality of light-receiving elements are arranged and a peripheral region provided around the light-receiving region; a sealing member disposed to be opposed to one surface of the sensor substrate; a resin layer that attaches the sensor substrate and the sealing member to each other; and an excavated part provided in the peripheral region of the one surface of the sensor substrate, and in which the resin layer is embedded, with the resin layer having one or a plurality of gaps inside the excavated part in a plan view.

Abstract: The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.

Abstract: Provided is a semiconductor device including: a multilayer substrate including an optical element; a light-transmitting plate provided on the substrate to cover the optical element; and a lens of an inorganic material provided between the substrate and the light-transmitting plate. A structure having a same strength as a strength per unit area of the lens is provided at a portion outside an effective photosensitive region where the optical element is formed, when the substrate is viewed in plan.

Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.