Patents by Inventor Yutaka Yoneda

Yutaka Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210289148
    Abstract: A sensor module comprising: A sensor chip (5) is provided on an upper surface of the substrate (1). A lens (7) is provided above the sensor chip (5) such that a light receiving unit of the sensor chip (5) is positioned in a projection area. A lens cap (8) includes a cap body (8a) surrounding the sensor chip (5) to hold the lens (7), and a cap edge part (8b) protruding outward from a lower end part of the cap body (8a). An ultraviolet-curing type bonding agent (9) bonds the upper surface of the substrate (1) and a lower surface of the lens cap (8). A cutout (10) is provided on an outer side surface of the cap edge part (8b). The bonding agent (9) enters in the cutout (10).
    Type: Application
    Filed: November 22, 2018
    Publication date: September 16, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yutaka YONEDA
  • Publication number: 20210203902
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Application
    Filed: March 16, 2021
    Publication date: July 1, 2021
    Applicant: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 10986323
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing, section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-convert d are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: April 20, 2021
    Assignee: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Publication number: 20210059054
    Abstract: A optical module according to the present invention includes an optical semiconductor device, a package housing the optical semiconductor device, a first pattern provided on an upper surface of the package, a second pattern provided on a side surface continuous with the upper surface of the package, a flexible substrate provided on the first pattern and extending from the upper surface to a side surface side of the package and solder joining the first pattern and the flexible substrate together, wherein the solder is spread between a portion of the flexible substrate, the portion extending from the upper surface to the side surface side of the package, and the second pattern.
    Type: Application
    Filed: September 7, 2018
    Publication date: February 25, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yutaka YONEDA, Takuro SHINADA
  • Publication number: 20210057876
    Abstract: A semiconductor module includes a sub-mount having a front surface, a back surface, side surfaces connecting the front surface and the back surface, a semiconductor element soldered onto the front surface of the sub-mount, and a block soldered onto the back surface of the sub-mount. The semiconductor element protrudes outward beyond a first side surface of the sub-mount, a concave portion is formed on each of a second side surface and a third side surface of the sub-mount perpendicular to the first side surface, the concave portion extending from the front surface of the sub-mount toward the back surface of the sub-mount, and the concave portion is disposed to allow a projection of a collet to be held in the concave portion with the front surface of the sub-mount held by suction by the collet.
    Type: Application
    Filed: March 12, 2019
    Publication date: February 25, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yutaka YONEDA, Junji FUJINO, Tadayoshi HATA, Jin SATO
  • Publication number: 20200296342
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing, section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-convert d are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 17, 2020
    Applicant: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 10708563
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: July 7, 2020
    Assignee: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 10421676
    Abstract: The invention provides a bactericidal/algicidal method including adding an oxidant-based bactericidal/algicidal agent and a stabilizer therefor to a target water system, characterized in that the amount of combined chlorine or the stabilizer in the water system is controlled by generating free residual chlorine in the water system, and a bactericidal/algicidal method including adding an oxidant-based bactericidal/algicidal agent and a stabilizer therefor to a target water system, characterized in that the amount of the oxidant-based bactericidal/algicidal agent added is controlled so that the concentration of total residual chlorine in the water system falls within a predetermined range, and the amount of combined chlorine or the stabilizer is controlled so that the concentration of free residual chlorine in the water system falls within a predetermined range.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: September 24, 2019
    Assignee: KURITA WATER INDUSTRIES LTD.
    Inventors: Yutaka Yoneda, Hideo Otaka, Kouichi Tanaka, Kazuhiko Tsunoda, Naohiro Nagai, Akira Iimura
  • Publication number: 20190281268
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Application
    Filed: April 23, 2019
    Publication date: September 12, 2019
    Applicant: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 10313648
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: June 4, 2019
    Assignee: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Publication number: 20190143434
    Abstract: A semiconductor device includes: a semiconductor element; a conductor pattern provided on an insulating substrate and having a main surface to which the semiconductor element is joined; and a terminal electrode joined to the main surface of the conductor pattern by a hard solder material and electrically connected to the semiconductor element. A joining region joined to the hard solder material in the conductor pattern includes: a first region in which the terminal electrode exists in a plan view; and a second region located outside the first region and not overlapping with the terminal electrode. The conductor pattern on the insulating substrate and the terminal electrode can be firmly joined by the hard solder material.
    Type: Application
    Filed: April 27, 2017
    Publication date: May 16, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yutaka YONEDA, Masao KIKUCHI
  • Patent number: 10096570
    Abstract: An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: October 9, 2018
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yutaka Yoneda, Junji Fujino, Kazuyoshi Shige, Yoichi Hironaka
  • Publication number: 20180151533
    Abstract: An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.
    Type: Application
    Filed: May 31, 2016
    Publication date: May 31, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yutaka YONEDA, Junji FUJINO, Kazuyoshi SHIGE, Yoichi HIRONAKA
  • Publication number: 20180124369
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Application
    Filed: December 27, 2017
    Publication date: May 3, 2018
    Applicant: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 9899345
    Abstract: An electrode terminal includes: a first drawn-out part to be bonded to a main electrode; and a second drawn-out part that is formed of a plate member in a continuous fashion from one end portion to be positioned opposite to the main electrode with a gap therebetween until another end portion to be connected to an external circuit, so that a portion in the first drawn-out part that is adjacent to a portion therein to be bonded to the main electrode, is bonded to an opposing surface to the main electrode in said one end portion; wherein the first drawn-out part is formed so that the portion to be bonded to the main electrode is away from the opposing surface; and wherein an opening portion corresponding to the main electrode is formed in the second drawn-out part.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: February 20, 2018
    Assignee: MITSUBISHI ELECTRIC COOPERATION
    Inventors: Junji Fujino, Yutaka Yoneda, Shohei Ogawa, Soichi Sakamoto, Mikio Ishihara, Miho Nagai
  • Patent number: 9866811
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: January 9, 2018
    Assignee: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Publication number: 20170230629
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Application
    Filed: April 28, 2017
    Publication date: August 10, 2017
    Applicant: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 9661291
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: May 23, 2017
    Assignee: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Publication number: 20170019650
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Application
    Filed: September 15, 2016
    Publication date: January 19, 2017
    Applicant: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda
  • Patent number: 9538153
    Abstract: In a high speed image capturing state, a camera signal processing circuit is not needed to perform a signal process at a high screen rate, but at a regular screen rate. In the high speed image capturing mode, raw data of 240 fps received from an image sensor 101 are recorded on a recording device 111 through a conversion processing section 201 and a recording device controlling circuit 210. Raw data that have been decimated and size-converted are supplied to a camera signal processing circuit 203 through a pre-processing circuit 202 and an image being captured is displayed on a display section 112 with a signal for which a camera process has been performed.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: January 3, 2017
    Assignee: Sony Corporation
    Inventors: Ryota Kosakai, Katsutoshi Aiki, Nobuyuki Sato, Hiroki Nagahama, Masatoshi Sase, Yutaka Yoneda