Abstract: An integrated circuit device includes an interconnect layer, a memory structure, a third conductive feature, and a fourth conductive feature. The interconnect layer includes a first conductive feature and a second conductive feature. The memory structure is over and in contact with the first conductive feature. The memory structure includes at least a resistance switching element over the first conductive feature. The third conductive feature, including a first conductive line, is over and in contact with the second conductive feature. The fourth conductive feature is over and in contact with the memory structure. The fourth conductive feature includes a second conductive line, a top surface of the first conductive line is substantially level with a top surface of the second conductive line, and a bottom surface of the first conductive line is lower than a bottommost portion of a bottom surface of the second conductive line.

Abstract: A multi-label classification method for generating labels annotated on medical images. An initial dataset including medical images and partial input labels is obtained. The partial input labels annotate a labeled part of abnormal features on the medical images. A first multi-label classification model is trained with the initial dataset. Difficulty levels of the medical images in the initial dataset are estimated based on predictions generated by the first multi-label classification model. The initial dataset is divided based on the difficulty levels of the medical images into different subsets. A second multi-label classification model is trained based on subsets with gradually increasing difficulty levels during different curriculum learning rounds. Predicted labels annotated on the medical images are generated about each of the abnormal features based on the second multi-label classification model.

Abstract: A coordinate generation system, a coordinate generation method, a computer readable recording medium with stored program, and a non-transitory computer program product are provided. The coordinate generation system includes processing units and a neural network module. The processing units are configured to obtain four vertex coordinates of an image. The vertex coordinates include first components and second components. The processing unit is configured to perform the following steps: obtaining first vector based on the first components of the four vertex coordinates and repeatedly concatenating the first vector so as to obtain a first input; obtaining second vector based on the second components of the four vertex coordinates and repeatedly concatenating the second vector so as to obtain a second input; and obtaining first output coordinate components and second output coordinate components of output coordinates based on the first input, the second input, and parameters of the neural network module.

Abstract: Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure. In some embodiments, a pair of memory cell structures is formed on a via dielectric layer, where the memory cell structures are separated by an inter-cell area. An inter-cell filler layer is formed covering the memory cell structures and the via dielectric layer, and further filling the inter-cell area. The inter-cell filler layer is recessed until a top surface of the inter-cell filler layer is below a top surface of the pair of memory cell structures and the inter-cell area is partially cleared. An interconnect dielectric layer is formed covering the memory cell structures and the inter-cell filler layer, and further filling a cleared portion of the inter-cell area.

Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.

Abstract: A centrifugal heat dissipation fan of a portable electronic device. The centrifugal heat dissipation fan includes a hub, multiple metal blades, and at least one ring. The metal blades are disposed surrounding the hub. The metal blades include multiple radial dimensions, and the structure of the metal blade with a shorter radial dimension is a part of the structure of the metal blade with a longer radial dimension. The metal blades having different radial dimensions form at least two ring areas, and the distribution numbers of the metal blades in the at least two ring areas are different from each other. The ring surrounds the hub and connects the metal blades.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller is provided. The housing has at least one inlet disposed along an axis and at least one first outlet and a second outlet located in different radial directions, wherein the first outlet and the second outlet are opposite to and separated from each other. The impeller is disposed in the housing along the axis. A heat dissipation system of an electronic device is also provided.

Abstract: A semiconductor structure includes: an etch-stop dielectric layer overlying a substrate and including a first opening therethrough; a silicon oxide plate overlying the etch-stop dielectric layer and including a second opening therethrough; a first conductive structure including a first electrode and extending through the second opening and the first opening; a memory film contacting a top surface of the first conductive structure and including a material that provides at least two resistive states having different electrical resistivity; and a second conductive structure including a second electrode and contacting a top surface of the memory film.

Abstract: A fan is provided herein, including a housing, a hub, and a plurality of blades. The housing includes a top case and a bottom case. The hub is rotatably disposed between the top case and the bottom case in an axial direction. The blades extend from the hub in a radial direction, located between the top case and the bottom case. Each of the blades has a proximal end and a distal end. The proximal end is connected to the hub. The distal end is opposite from the proximal end, located at the other side of the blade, having at least one recessed portion. Each of the recessed portions form a passage for air.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.

Abstract: A method for fabricating an electrical test apparatus electrical probe tip first provides a probe tip substrate having a topographic surface. A high density plasma chemical vapor deposition (HDP-CVD) deposited mandrel layer is then formed upon the topographic surface. It has a series of pointed tips formed over a series of topographic features within the topographic surface. Finally, a conductor probe tip layer is formed conformally upon the high density plasma chemical vapor deposition (HDP-CVD) deposited mandrel layer and replicating the series of pointed tips. Due to the series of pointed tips and the series of replicated pointed tips, a microelectronic fabrication when tested with the electrical test apparatus electrical probe tip is tested with enhanced accuracy.

Abstract: An apparatus and method for testing the electrical characteristics of a semiconductor wafer, including integrated circuit components thereof. An outer layer surrounds an inside needle, such that the outer layer comprises a hard material, which can penetrate through a semiconductor layer to permit subsequent testing of at least one semiconductor integrated circuit component located below the semiconductor layer. The inside needle may be adapted to electrically contact one or more electrical semiconductor circuit components located below the semiconductor layer. The inside needle generally comprises a prober, while the outer layer generally comprises a piercer. The outer layer may be configured from a hard material, such as diamond or carborundum. The inside needle and the outer layer together form a concentric double layer structure prober. The outer layer generally comprises a sheath formed from a hard dielectric material, such that the sheath comprises a piercer.

Abstract: Within a method for fabricating an electrical test apparatus electrical probe tip, there first provided a probe tip substrate comprising a topographic surface. There is then formed upon the topographic surface a high density plasma chemical vapor deposition (HDP-CVD) deposited mandrel layer having formed therein a series of pointed tips formed over a series of topographic features within the topographic surface. Finally, there is formed conformally upon the high density plasma chemical vapor deposition (HDP-CVD) deposited mandrel layer and replicating the series of pointed tips a conductor probe tip layer. Due to the series of pointed tips and the series of replicated pointed tips, a microelectronic fabrication when tested with the electrical test apparatus electrical probe tip is tested with enhanced accuracy.

Abstract: An apparatus and method for testing the electrical characteristics of a semiconductor wafer, including integrated circuit components thereof. An outer layer surrounds an inside needle, such that the outer layer comprises a hard material, which can penetrate through a semiconductor layer to permit subsequent testing of at least one semiconductor integrated circuit component located below the semiconductor layer. The inside needle may be adapted to electrically contact one or more electrical semiconductor circuit components located below the semiconductor layer. The inside needle generally comprises a prober, while the outer layer generally comprises a piercer. The outer layer may be configured from a hard material, such as diamond or carborundum. The inside needle and the outer layer together form a concentric double layer structure prober. The outer layer generally comprises a sheath formed from a hard dielectric material, such that the sheath comprises a piercer.