Abstract: Disclosed is a semiconductor device including a semiconductor layer having a main surface, a first conductivity type drift region formed at a surface layer part of the main surface, a super junction region having a first conductivity type first column region and a second conductivity type second column region, a second conductivity type low resistance region formed at the surface layer part of the drift region and having an impurity concentration in excess of that of the second column region, a region insulating layer formed on the main surface and covering the low resistance region such as to cause part of the low resistance region to be exposed, a first pad electrode formed on the region insulating layer such as to overlap with the low resistance region, and a second pad electrode formed on the main surface and electrically connected to the second column region and the low resistance region.

Abstract: Disclosed is a semiconductor device including a semiconductor layer having a main surface, a first conductivity type drift region formed at a surface layer part of the main surface, a super junction region having a first conductivity type first column region and a second conductivity type second column region, a second conductivity type low resistance region formed at the surface layer part of the drift region and having an impurity concentration in excess of that of the second column region, a region insulating layer formed on the main surface and covering the low resistance region such as to cause part of the low resistance region to be exposed, a first pad electrode formed on the region insulating layer such as to overlap with the low resistance region, and a second pad electrode formed on the main surface and electrically connected to the second column region and the low resistance region.

Abstract: A semiconductor device including, a semiconductor layer including a plurality of first trenches formed therein and a second trench formed in a region between the first trenches, channel regions formed in regions between the first and second trenches in a surface layer portion of the semiconductor layer, field plate electrodes embedded at bottom portion sides of the respective first trenches, first gate electrodes embedded at opening portion sides of the respective first trenches so as to face the channel regions across first gate insulating films above the field plate electrodes, second insulating films interposed between the field plate electrodes and the first gate electrodes, an embedded insulating film embedded to an intermediate portion of the second trench, and a second gate electrode embedded in the second trench so as to face the channel regions across a second gate insulating film above the embedded insulating film.

Abstract: A semiconductor device including, a semiconductor layer including a plurality of first trenches formed therein and a second trench formed in a region between the first trenches, channel regions formed in regions between the first and second trenches in a surface layer portion of the semiconductor layer, field plate electrodes embedded at bottom portion sides of the respective first trenches, first gate electrodes embedded at opening portion sides of the respective first trenches so as to face the channel regions across first gate insulating films above the field plate electrodes, second insulating films interposed between the field plate electrodes and the first gate electrodes, an embedded insulating film embedded to an intermediate portion of the second trench, and a second gate electrode embedded in the second trench so as to face the channel regions across a second gate insulating film above the embedded insulating film.

Abstract: A semiconductor device including, a semiconductor layer including a plurality of first trenches formed therein and a second trench formed in a region between the first trenches, channel regions formed in regions between the first and second trenches in a surface layer portion of the semiconductor layer, field plate electrodes embedded at bottom portion sides of the respective first trenches, first gate electrodes embedded at opening portion sides of the respective first trenches so as to face the channel regions across first gate insulating films above the field plate electrodes, second insulating films interposed between the field plate electrodes and the first gate electrodes, an embedded insulating film embedded to an intermediate portion of the second trench, and a second gate electrode embedded in the second trench so as to face the channel regions across a second gate insulating film above the embedded insulating film.

Abstract: A semiconductor device including, a semiconductor layer including a plurality of first trenches formed therein and a second trench formed in a region between the first trenches, channel regions formed in regions between the first and second trenches in a surface layer portion of the semiconductor layer, field plate electrodes embedded at bottom portion sides of the respective first trenches, first gate electrodes embedded at opening portion sides of the respective first trenches so as to face the channel regions across first gate insulating films above the field plate electrodes, second insulating films interposed between the field plate electrodes and the first gate electrodes, an embedded insulating film embedded to an intermediate portion of the second trench, and a second gate electrode embedded in the second trench so as to face the channel regions across a second gate insulating film above the embedded insulating film.