Patents by Inventor Yuto Tamura

Yuto Tamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11710835
    Abstract: A fuel cell module includes a stack including a plurality of fuel cells stacked together, at least one dummy cell in contact with the stack at an end portion of the stack in a stacking direction, a reactant gas supply path configured to supply a reactant gas that is either a fuel gas or an oxidant gas to the fuel cells and the dummy cell, and a reactant gas discharge path in communication with the fuel cells and the dummy cell. The fuel cells and the dummy cell each include a reactant gas flow path configured to cause the reactant gas from the reactant gas supply path to flow toward the reactant gas discharge path. Pressure loss of the reactant gas flow path of the dummy cell is smaller than pressure loss of the reactant gas flow path of the fuel cells.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: July 25, 2023
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yuto Tamura, Tomoo Yoshizumi
  • Publication number: 20220263103
    Abstract: A fuel cell module includes a stack including a plurality of fuel cells stacked together, at least one dummy cell in contact with the stack at an end portion of the stack in a stacking direction, a reactant gas supply path configured to supply a reactant gas that is either a fuel gas or an oxidant gas to the fuel cells and the dummy cell, and a reactant gas discharge path in communication with the fuel cells and the dummy cell. The fuel cells and the dummy cell each include a reactant gas flow path configured to cause the reactant gas from the reactant gas supply path to flow toward the reactant gas discharge path. Pressure loss of the reactant gas flow path of the dummy cell is smaller than pressure loss of the reactant gas flow path of the fuel cells.
    Type: Application
    Filed: January 10, 2022
    Publication date: August 18, 2022
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yuto TAMURA, Tomoo YOSHIZUMI
  • Patent number: 10884733
    Abstract: An apparatus causes a management unit included in an arithmetic processing unit to manage, where an executable task is included in a queue, execution of the task. The apparatus causes a standby unit included in the arithmetic processing unit to execute, when the executable task is not included in the queue, a decision process for deciding, by polling, whether information from another apparatus different from the apparatus is received by a communication controller until the executable task is included in the queue.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: January 5, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima
  • Publication number: 20200381749
    Abstract: A first resin frame of a power generation cell includes a fuel gas communication structure configured to lead fuel gas to a first surface of a membrane electrode assembly, and an oxidation gas communication structure configured to lead oxidation gas to a second surface of the membrane electrode assembly. A second resin frame of a non-power generation cell includes either one of a fuel gas communication structure configured to lead fuel gas to a conductive member, and an oxidation gas communication structure configured to lead oxidation gas to the conductive member.
    Type: Application
    Filed: May 4, 2020
    Publication date: December 3, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kenji SATO, Yuto TAMURA, Tomoo YOSHIZUMI
  • Patent number: 10649934
    Abstract: An information processing apparatus includes a memory; and a processor coupled to the memory and the processor configured to poll and monitor a plurality of monitoring targets, wherein the number of times of monitoring a first monitoring target is greater than the number of times of monitoring a second monitoring target.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: May 12, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Yuto Tamura
  • Patent number: 10387190
    Abstract: A system includes circuitry configured to execute a first thread of a plurality of threads, measure an execution time period during which the circuitry executes the first thread without executing other threads of the plurality of threads, determine whether the measured execution time period exceeds a threshold value, specify first address information of a first instruction which is included in the first thread when it is determined that the measured execution time period exceeds the threshold value, the first instruction being an instruction that is scheduled to be executed, exchange the first instruction stored in an address region specified by the first address information with a second instruction instructing the circuitry to switch from executing the first thread to executing a second thread of the plurality of threads, and switch from executing the first thread to the executing the second thread by executing the second instruction.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: August 20, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima
  • Patent number: 10324751
    Abstract: An information processing apparatus includes: a memory configured to store an information processing program; and a plurality of processor cores configured to acquire and execute a task from a storage region which is provided for each of the processor cores and including a first processor core configured to execute the information processing program, wherein the first processor core: performs, in work steal in which a task stored in a storage region of the first processor core is acquired by a second processor core, a writing process for an abort region, which is provided corresponding to the task, for detecting access contention by the first processor core and the second processor core using a transactional memory function; and performs a reading process for the abort region when the task is to be acquired from the storage region.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 18, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Yuto Tamura
  • Publication number: 20190018674
    Abstract: An apparatus causes a management unit included in an arithmetic processing unit to manage, where an executable task is included in a queue, execution of the task. The apparatus causes a standby unit included in the arithmetic processing unit to execute, when the executable task is not included in the queue, a decision process for deciding, by polling, whether information from another apparatus different from the apparatus is received by a communication controller until the executable task is included in the queue.
    Type: Application
    Filed: July 6, 2018
    Publication date: January 17, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima
  • Patent number: 9928045
    Abstract: An information processing apparatus includes: a memory configured to store a first code; and a processor configured to compile a source file to generate the first code, wherein the processor: generates a second code, which is executable by the processor, based on a result of analysis of the source program; and divides the second code into blocks of a size equal to or smaller than a given size including a reservation region to generate the first code.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: March 27, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Kohta Nakashima, Yuto Tamura, Masao Yamamoto
  • Publication number: 20180019837
    Abstract: A method for determining a communication method executed by a processor included in a computer, the method includes selecting a communication method from a plurality of communication methods based on a size of communication data, by referring to selection probability information in which a range of a size of communication data and a probability of selecting a communication method are associated for each of the plurality of communication methods; executing communication using the selected communication method; updating the selection probability information based on a result of the executed communication; and executing communication based on the updated selection probability information.
    Type: Application
    Filed: June 1, 2017
    Publication date: January 18, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima
  • Patent number: 9852008
    Abstract: An information processing apparatus includes a storage device and a processor that runs a virtual machine. The processor detects a waiting process that is ready for execution on the virtual machine, and writes process information about the detected waiting process in a storage area of the storage device, which is accessible area to management software managing the virtual machine.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: December 26, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima
  • Publication number: 20170322830
    Abstract: An information processing apparatus includes: a memory configured to store an information processing program; and a plurality of processor cores configured to acquire and execute a task from a storage region which is provided for each of the processor cores and including a first processor core configured to execute the information processing program, wherein the first processor core: performs, in work steal in which a task stored in a storage region of the first processor core is acquired by a second processor core, a writing process for an abort region, which is provided corresponding to the task, for detecting access contention by the first processor core and the second processor core using a transactional memory function; and performs a reading process for the abort region when the task is to be acquired from the storage region.
    Type: Application
    Filed: March 23, 2017
    Publication date: November 9, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Yuto Tamura
  • Publication number: 20170262392
    Abstract: An information processing apparatus includes a memory; and a processor coupled to the memory and the processor configured to poll and monitor a plurality of monitoring targets, wherein the number of times of monitoring a first monitoring target is greater than the number of times of monitoring a second monitoring target.
    Type: Application
    Filed: February 24, 2017
    Publication date: September 14, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Yuto Tamura
  • Publication number: 20170060548
    Abstract: An information processing apparatus includes: a memory configured to store a first code; and a processor configured to compile a source file to generate the first code, wherein the processor: generates a second code, which is executable by the processor, based on a result of analysis of the source program; and divides the second code into blocks of a size equal to or smaller than a given size including a reservation region to generate the first code.
    Type: Application
    Filed: July 12, 2016
    Publication date: March 2, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Kohta Nakashima, Yuto Tamura, MASAO YAMAMOTO
  • Publication number: 20160328232
    Abstract: A system includes circuitry configured to execute a first thread of a plurality of threads, measure an execution time period during which the circuitry executes the first thread without executing other threads of the plurality of threads, determine whether the measured execution time period exceeds a threshold value, specify first address information of a first instruction which is included in the first thread when it is determined that the measured execution time period exceeds the threshold value, the first instruction being an instruction that is scheduled to be executed, exchange the first instruction stored in an address region specified by the first address information with a second instruction instructing the circuitry to switch from executing the first thread to executing a second thread of the plurality of threads, and switch from executing the first thread to the executing the second thread by executing the second instruction.
    Type: Application
    Filed: April 27, 2016
    Publication date: November 10, 2016
    Inventors: Yuto TAMURA, Kohta NAKASHIMA
  • Publication number: 20160320984
    Abstract: An information processing device includes a storage unit, and a processing unit which carries out one or more threads, and wherein the processing unit judges whether or not a plurality of threads, which access the shared memory area, is carried out when executing an access processing to the shared memory area, carries out the access processing based on a first exclusive control which waits a start of the access processing by another thread during an execution of the access processing by one thread, when judging that single thread is carried out, and carries out the access processing based on a second exclusive control which cancels the access processing by one thread in case that a write for the shared memory area by another thread occurs during an execution of the access processing by one thread, when judging that the plurality of threads are carried out.
    Type: Application
    Filed: March 17, 2016
    Publication date: November 3, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima
  • Publication number: 20160239331
    Abstract: An information processing apparatus includes a storage device and a processor that runs a virtual machine. The processor detects a waiting process that is ready for execution on the virtual machine, and writes process information about the detected waiting process in a storage area of the storage device, which is accessible area to management software managing the virtual machine.
    Type: Application
    Filed: December 18, 2015
    Publication date: August 18, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Yuto Tamura, Kohta Nakashima