Patents by Inventor Yuuchi Takeuchi

Yuuchi Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5776812
    Abstract: A manufacturing method of a MOSFET having a channel part on the side surface of a groove, which does not permit the introduction of defects or contaminant into the channel part and which can make the shape of the groove uniform. An n.sup.- -type epitaxial layer having a low impurity concentration is formed on a main surface of an n.sup.+ -type semiconductor substrate. This surface is specified as a main surface, and chemical dry etching is applied to a specified region of this main surface. A region including a surface generated by the chemical dry etching is selectively oxidized to form a selective oxide film to a specified thickness. Following this process, p-type and n-type impurities are doubly diffused from the main surface to define the length of the channel and form a base layer and a source layer. Furthermore, the n.sup.+ -type semiconductor substrate is specified as a drain layer.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: July 7, 1998
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shigeki Takahashi, Mitsuhiro Kataoka, Tsuyoshi Yamamoto, Yuuchi Takeuchi, Norihito Tokura