Patents by Inventor Yuuichi Koga

Yuuichi Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7957157
    Abstract: A printed circuit board including: a semiconductor package; a board; first to fourth electrodes on a second face of the semiconductor package; fifth to eighth electrodes on a mount region of the board; a first conductor connecting the first electrode with the second electrode; a second conductor connecting the third electrode with the fourth electrode; a third conductor connecting the sixth electrode with the seventh electrode; fourth conductors respectively connecting to the fifth electrode and the eighth electrode; conductive bonding portions bonding each of the electrodes on the second face with corresponding one of the electrodes on the mount region; and a determination circuit connected to the fourth conductors and configured to determine a difference between a value of current supplied to one of the fourth conductors and a value of current received through the other fourth conductor.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: June 7, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Koga
  • Publication number: 20100220454
    Abstract: A printed circuit board including: a semiconductor package; a board; first to fourth electrodes on a second face of the semiconductor package; fifth to eighth electrodes on a mount region of the board; a first conductor connecting the first electrode with the second electrode; a second conductor connecting the third electrode with the fourth electrode; a third conductor connecting the sixth electrode with the seventh electrode; fourth conductors respectively connecting to the fifth electrode and the eighth electrode; conductive bonding portions bonding each of the electrodes on the second face with corresponding one of the electrodes on the mount region; and a determination circuit connected to the fourth conductors and configured to determine a difference between a value of current supplied to one of the fourth conductors and a value of current received through the other fourth conductor.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 2, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yuuichi KOGA
  • Patent number: 7595992
    Abstract: According to one embodiment, a substrate unit of the present invention comprises a first substrate, a second substrate and a coupling member. The first substrate has a first substrate main body and a circuit component. The second substrate has a second substrate main body, an opening portion provided at the second substrate main body, and a cooling module which cools the circuit component. The circuit component is mounted on a face of the first substrate main body which is opposite to the second substrate. The cooling module has a main body and a projecting portion. The coupling member fixes the main body to a second face of the second substrate main body, and couples the first substrate and the second substrate so as to fit the projecting portion in the opening portion and press the projecting portion against the circuit component.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: September 29, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Koga
  • Publication number: 20090000810
    Abstract: According to one embodiment, there is provided a printed wiring board includes a mounting surface for mounting an electronic component, a first component mounted on the mounting surface, an index portion provided on the mounting surface for defining a mounting position Pa of a second component being mounted on the mounting surface in a process after the first component is mounted, the index portion including two direction positions on the mounting surface, and the second component mounted on the mounting surface based on the index portion.
    Type: Application
    Filed: June 25, 2008
    Publication date: January 1, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yuuichi Koga
  • Publication number: 20070200190
    Abstract: According to one embodiment, a substrate unit of the present invention comprises a first substrate, a second substrate and a coupling member. The first substrate has a first substrate main body and a circuit component. The second substrate has a second substrate main body, an opening portion provided at the second substrate main body, and a cooling module which cools the circuit component. The circuit component is mounted on a face of the first substrate main body which is opposite to the second substrate. The cooling module has a main body and a projecting portion. The coupling member fixes the main body to a second face of the second substrate main body, and couples the first substrate and the second substrate so as to fit the projecting portion in the opening portion and press the projecting portion against the circuit component.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 30, 2007
    Inventor: Yuuichi Koga
  • Patent number: 7245503
    Abstract: To provide a circuit board comprising a plurality of first signal lines which transmits first signals, a plurality of second signal lines which transmits second signals which are higher in speed than the first signals, a joint which is bonded to a joint of another circuit board through an anisotropic conductive material, a plurality of first electrodes which are arranged at regular intervals separated by a first distance in the joint, each of the first electrodes are connected to a respective one of the first signal lines, and a plurality of second electrodes which are arranged at regular intervals separated by a second distance larger than the first distance in the joint, each of the second electrodes are connected to a respective one of the second signal lines.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: July 17, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Koga
  • Publication number: 20060113109
    Abstract: To provide a circuit board comprising a plurality of first signal lines which transmits first signals, a plurality of second signal lines which transmits second signals which are higher in speed than the first signals, a joint which is bonded to a joint of another circuit board through an anisotropic conductive material, a plurality of first electrodes which are arranged at regular intervals separated by a first distance in the joint, each of the first electrodes are connected to a respective one of the first signal lines, and a plurality of second electrodes which are arranged at regular intervals separated by a second distance larger than the first distance in the joint, each of the second electrodes are connected to a respective one of the second signal lines.
    Type: Application
    Filed: November 29, 2005
    Publication date: June 1, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yuuichi Koga
  • Patent number: 6515563
    Abstract: A print board comprises a ground layer, an insulation layer, a signal layer formed on the insulation layer, formed in a predetermined line pattern, and serving as a transmission line for transmitting high-speed signals, and a pad formed on the signal layer. The signal layer has a line width that satisfies a characteristic impedance required for the transmission line, and the width of the signal layer is set substantially equal to the width of the pad.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: February 4, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Koga
  • Publication number: 20020057144
    Abstract: A print board comprises a ground layer, an insulation layer, a signal layer formed on the insulation layer, formed in a predetermined line pattern, and serving as a transmission line for transmitting high-speed signals, and a pad formed on the signal layer. The signal layer has a line width that satisfies a characteristic impedance required for the transmission line, and the width of the signal layer is set substantially equal to the width of the pad.
    Type: Application
    Filed: June 28, 2001
    Publication date: May 16, 2002
    Inventor: Yuuichi Koga