Patents by Inventor Yuuichi Murano

Yuuichi Murano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7554795
    Abstract: An electronic component has an element, a pair of terminal portions which are disposed on the element, and an external covering material which covers a part of the terminal portions and the element. The electronic component is configured such that inclined portions are disposed on corner portions of a bottom surface and side surfaces of the external covering material, and the terminal portions are protruded from corner portions where the inclined portions and the bottom surface of the external covering material intersect.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: June 30, 2009
    Assignee: Panasonic Corporation
    Inventors: Akio Hidaka, Shouichi Ikebe, Yuuichi Murano, Hirozumi Kazitani, Mika Ikeda, Yoshitaka Mizoguchi
  • Patent number: 7333318
    Abstract: A multilayer capacitor 1 has a laminated body 20 configured by laminating a plurality of dielectric substrates 2 each having a plurality of internal electrodes 3 and 5 formed on its main surface and a capacitance component is generated between the facing internal electrodes 3 and 5. The dielectric constant of the dielectric substrate located at a central portion of a lamination direction of the laminated body 20 is lower than that of the dielectric substrate 2 located at the edge of the lamination direction.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: February 19, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akio Hidaka, Yuuichi Murano, Shinichi Wakasugi
  • Publication number: 20080030922
    Abstract: A mulitilayer A capacitor includes a plurality of dielectric substrates (2) which are layered; a pair of terminal electrodes formed on the plurality of dielectric substrates; a plurality of internal electrodes (3) arranged on each of the dielectric substrates and having outer edges (30) opposed apart by a predetermined interval, wherein at least one of the internal electrodes (3) is arranged apart from the adjacent internal electrode (3) by the maximum interval (5) at the center of the outer edges (30).
    Type: Application
    Filed: September 27, 2005
    Publication date: February 7, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Akio Hidaka, Yuuichi Murano, Shinichi Wakasugi, Hidetsugu Fujimoto, Yoshitaka Mizoguchi
  • Publication number: 20080024960
    Abstract: The present invention aims to supply an electronic component which is manufactured in a manufacturing process at low cost, and realize improvement of shock resistance, endurance, flexure resistance, mounting reliability etc. at the same time, without requiring fine adjustment etc. The invention is an electronic component 1 which has an element 2, a pair of terminal portions 4 which were disposed on the element 2, and an external covering material 5 which covers the a part of the terminal portions 4 and the element 2, and configured in such a manner that inclined portions 10 are disposed on corner portions of a bottom surface 9 and side surfaces of the external covering material 5, and the terminal portions 4 are protruded from corner portions where the inclined portions 10 and the bottom surface 9 of the external covering material intersect.
    Type: Application
    Filed: June 3, 2005
    Publication date: January 31, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Akio Hidaka, Shouichi Ikebe, Yuuichi Murano, Hirozumi Kazitani, Mika Ikeda, Yoshitaka Mizoguchi
  • Publication number: 20070058326
    Abstract: A multilayer capacitor 1 has a laminated body 20 configured by laminating a plurality of dielectric substrates 2 each having a plurality of internal electrodes 3 and 5 formed on its main surface and a capacitance component is generated between the facing internal electrodes 3 and 5. The dielectric constant of the dielectric substrate located at a central portion of a lamination direction of the laminated body 20 is lower than that of the dielectric substrate 2 located at the edge of the lamination direction.
    Type: Application
    Filed: September 11, 2006
    Publication date: March 15, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Akio Hidaka, Yuuichi Murano, Shinichi Wakasugi
  • Patent number: 7133274
    Abstract: A multilayer capacitor including a base body, which is a dielectric substance; and a plurality of electrode layers, which is laminated in the base body and has a plurality of divided electrodes, in which there are at least three or more kinds of electrode layers having different number of electrodes, and the electrode layer having the most electrodes is interposed between the other electrode layers. The multilayer capacitor achieves high withstand voltage and high reliability with no damage to the size reduction and high capacitance of the capacitor and a mold capacitor having the multilayer capacitor built-in.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: November 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akio Hidaka, Yuuichi Murano, Shinichi Wakasugi, Hidetsugu Fujimoto
  • Publication number: 20060158825
    Abstract: A multilayer capacitor including a base body, which is a dielectric substance; and a plurality of electrode layers, which is laminated in the base body and has a plurality of divided electrodes, in which there are at least three or more kinds of electrode layers having different number of electrodes, and the electrode layer having the most electrodes is interposed between the other electrode layers. The multilayer capacitor achieves high withstand voltage and high reliability with no damage to the size reduction and high capacitance of the capacitor and a mold capacitor having the multilayer capacitor built-in.
    Type: Application
    Filed: January 18, 2006
    Publication date: July 20, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Akio Hidaka, Yuuichi Murano, Shinichi Wakasugi, Hidetsugu Fujimoto