Patents by Inventor Yuuichi Sano

Yuuichi Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6424572
    Abstract: A semiconductor memory apparatus includes a plurality of memory cells (MC1˜MC4); and a write circuit (44). The write circuit (44) performs a writing operation on the memory cell (MC1). A first voltage is supplied to the write circuit (44) when the writing operation is performed on the memory cell (MC1). A second voltage equal to or lower than the first voltage is supplied to the write circuit (44) when a reading operation is performed on the memory cell (MC1).
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: July 23, 2002
    Assignee: NEC Corporation
    Inventor: Yuuichi Sano
  • Patent number: 6404117
    Abstract: A section perpendicular to a tube axis, of a yoke portion having a deflection yoke mounted thereon is in the shape of a non-circle based on a rectangle. A section perpendicular to the tube axis, of a core portion of the deflection yoke has a shape holding the relation (M+N)/(2*(M2+N2)½<(SB+LB)/(2DB)≦0.90 where M:N is an aspect ratio, SB is the inner diameter along the vertical axis, LB the inner diameter along the horizontal axis, and DB a maximum inner diameter.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: June 11, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kouichi Soneda, Yuuichi Sano, Masahiro Yokota
  • Patent number: 6396206
    Abstract: An electron gun which emits three electron beams consisting of a center beam and paired side beams arranged in line in the horizontal axis is arranged in the neck of the vacuum envelope. A neck-side orbital correction coil unit for over-converging the side beams running toward the peripheral portion of a phosphor screen and a panel-side orbital correction coil unit for under-converging the side beams running toward the peripheral portion of the phosphor screen are provided between the cathode of the electron gun and the phosphor screen. The panel-side orbital correction coil unit has four orbital correction coils provided inside the magnetic core of a deflection yoke. Each orbital correction coil includes paired coil wires extending in the tube axis direction. One of the coil wires is positioned at an angle of 10 to 30° to the vertical axis, and the current flows from the neck side toward the panel through this coil wire.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: May 28, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuuichi Sano, Masahiro Yokota, Hiroaki Ibuki
  • Patent number: 6384525
    Abstract: In an increased-diameter funnel section and a almost pyramidal decreased-diameter yoke section constituting the funnel section of the envelope of a cathode-ray tube, the outside surface of the yoke section between a neck connecting portion on which a neck and the yoke section are coupled and a position close to a boundary of a increased funnel section, on which deflection yoke is provided, is shaped so as to fulfill the following expression: 0.00≦(&agr;0−&agr;min)≦0.04 where the index value indicating the degree of rectangle at the deflection reference position is &agr;0 and the minimum of the index values in the whole area of the yoke section is &agr;min. This makes it possible to provide a cathode-ray tube apparatus which secures a sufficient strength of the vacuum envelope to atmospheric pressure even when the yoke section is made pyramidal and which reduces the deflection power effectively and thereby fulfills the demands for higher luminance and higher-frequency deflection.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: May 7, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuuichi Sano, Hideo Mori
  • Patent number: 6380667
    Abstract: A color cathode-ray tube having at least one trajectory correction device including a plurality of trajectory correction coils, and a current supply circuit for supplying current to these coils. The trajectory correction device functions to over-converge or under-converge a pair of side beams at a peripheral portion of the phosphor screen relative to a center of the phosphor screen. The trajectory correction device produces a magnetic field such that there is a position in the produced magnetic field where no force is exerted on the three electron beams. This position is separated from a plane including a tube axis, and a first direction or a second direction. In this color cathode-ray tube apparatus with this structure, no degradation occurs in focusing or distortion characteristics even where the trajectory correction device is provided, for example, in realizing a flat screen by using a press-formed shadow mask.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: April 30, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yokota, Yuuichi Sano, Hiroaki Ibuki
  • Patent number: 6307314
    Abstract: A novel cathode ray tube apparatus is disclosed, in which a yoke portion with a deflection yoke mounted thereon has a basically rectangular non-circular section perpendicular to the tube axis. A separator of the deflection yoke has a section perpendicular to the tube axis expressed as (M+N)/(2*(M2+N2)½)<(SS+LS)/(2DS)≦0.90 where M:N is the aspect ratio, SS the outer diameter along the vertical axis, LS the outer diameter along the horizontal axis, and DS the maximum outer diameter.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: October 23, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuuichi Sano
  • Publication number: 20010026473
    Abstract: A semiconductor memory apparatus, includes a plurality of memory cells (MC1˜MC4); and a write circuit (44). The write circuit (44) performs a writing operation on the memory cell (MC1). A first voltage is supplied to the write circuit (44) when the writing operation is performed on the memory cell (MC1). A second voltage equal to or lower than the first voltage is supplied to the write circuit (44) when a reading operation is performed on the memory cell (MC1).
    Type: Application
    Filed: March 27, 2001
    Publication date: October 4, 2001
    Inventor: Yuuichi Sano
  • Patent number: 6268692
    Abstract: A vacuum envelope of a cathode ray tube includes a rectangular panel having an inner surface where a substantially rectangular phosphor screen is formed, a neck in which an electron gun is provided, and a funnel connected between the panel and the neck. The funnel has a first portion having a large diameter and positioned on the phosphor screen side, and a substantially truncated quadrangular pyramid-like second portion positioned on the neck side. From the second portion to the neck, a deflection yoke is mounted on the outer surface of the funnel. Where the vacuum envelope is cut along a plane including a tube axis, the shapes of the cross-sections of the first and second portions have an inflection point at the boundary between the first and second portions. The end of the deflection yoke on the phosphor screen side is positioned near the inflection point.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: July 31, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yokota, Yuuichi Sano
  • Patent number: 6195297
    Abstract: In a semiconductor memory device constructed a memory cell array including a plurality of read-only memory cells connected to a plurality of bit lines, a plurality of sense amplifiers each including a first MOS trnasistor connected to one of the bit lines, a reference voltage generating circuit for applying a reference voltage to a gate of the first MOS transistor, and a bit line selection circuit, for generating a plurality of bit line selection signals for selecting the bit lines respectively, a plurality of second MOS trnasistors, each of which is connected between one of the bit lines and the ground terminal, is provided. Also, a plurality of inverters, are connected between the bit line selection circuit and the second MOS transistors, so that the second MOS transistors are controlled by inverted signals of the bit line selection signals.
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: February 27, 2001
    Assignee: NEC Corporation
    Inventor: Yuuichi Sano
  • Patent number: 6087767
    Abstract: A funnel (32) of an envelope of a cathode ray tube has a cone portion (40) and a deflection yoke (37) is mounted on the cone portion (40). The deflection yoke (37) includes a hollow magnetic core (44), and horizontal deflection coils (43H) and vertical deflection coils (43V) which are provided on an inner surface side of the core (44). Each of lateral cross-sections of an outer surface of the cone portion (40) and an inner surface of the core (44), perpendicular to a center axis of the funnel (32), has a substantially rectangular shape, and a gap between the lateral cross-sections of the outer surface of the cone portion (40) and the inner surface of the core (44) includes a non-uniform portion.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: July 11, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuuichi Sano, Masahiro Yokota
  • Patent number: 6002203
    Abstract: A cathode ray tube includes a vacuum envelope having a substantially rectangular panel, a cylindrical neck, and a funnel connecting the panel and the neck. A phosphor screen arranged on the inner surface of the panel generates luminescence upon impingement of electron beams, which are generated by an electron gun assembly disposed in the neck. In order to create a image visible through the panel, a deflection yoke is mounted on the outer surface of the funnel to generate a magnetic field in the funnel, deflect the electron beams, and thereby scan the phosphor screen. According to the present invention, the portion of the funnel over which the deflection yoke is mounted is formed such that the power required to generate a deflection field capable of scanning substantially the entire phosphor screen may be reduced.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: December 14, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yokota, Yuuichi Sano, Eiji Kamohara, Tadahiro Kojima
  • Patent number: 5962964
    Abstract: A cathode ray tube apparatus having a vacuum enclosure defined by a neck extending into a yoke portion and further extending into a panel including a screen, wherein a deflection yoke is fixed on the outer surface of the yoke portion which is formed between the screen and the neck of a vacuum enclosure. According to the invention, if the cross-sectional configuration of the yoke portion perpendicular to the tube axis at a reference deflection position is non-circular, e.g., barrel-like or rectangle-like, the aspect ratio of scanning of the screen is M:N, lengths LA, SA and DA are defined between a tube axis and intersection points of horizontal, vertical and diagonal axes and the outer periphery of the yoke portion at the reference deflection position, the following equation is established:(M+N)/2(M.sup.2+ N.sup.2).sup.1/2 <(SA+LA)/(2DA).ltoreq.0.86whereby sufficient anti-implosion strength is achieved with reduced deflection power consumption.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: October 5, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuuichi Sano, Masahiro Yokota
  • Patent number: 5929559
    Abstract: A funnel of a cathode ray tube includes a yoke attachment portion on which a deflection yoke is mounted so as to deflect the electron beam emitted from an electron gun along horizontal and vertical axis. At least one cross section of the yoke attachment portion, perpendicular to the tube axis, has an inner contour which is substantially rectangular with four sides. The sides are defined by convexities curved toward the tube axis and each having a peak on the horizontal or vertical axis. The inner contour of the cross section faces the electron beam passage region with a substantially constant gap.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuuichi Sano, Masahiro Yokota, Tadahiro Kojima, Eiji Kamohara
  • Patent number: 5763995
    Abstract: This cathode ray tube includes a vacuum envelope having a substantially rectangular panel, a funnel formed contiguous to the panel, and a cylindrical neck formed contiguous to the small-diameter end portion of the funnel, an electron gun assembly disposed in the neck to generate electron beams, and a deflection yoke mounted on the outer side of the funnel near the neck side over a predetermined range to form a magnetic field in the funnel, thereby deflecting the electron beams along the major and minor axes of the panel. Of the predetermined range of the funnel, at the neck side, the funnel is formed to have an outer shape with a section which is gradually deformed, from the neck side to the panel side, from a circular shape to a non-circular shape having a maximum diameter along a direction other than the major and minor axes. The funnel of the predetermined range is formed to have an outer shape with a section that satisfies a relation:0.3.ltoreq..DELTA.HV/L.ltoreq.0.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: June 9, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuuichi Sano, Masahiro Yokota, Tadahiro Kojima, Eiji Kamohara
  • Patent number: 5654921
    Abstract: The non-volatile memory includes a word line potential control circuit in a non-volatile memory having a memory cell array, word lines, bit lines, an X decoder, a bit line selector, and a source voltage applying circuit. The word line potential control circuit is provided with a threshold voltage detection circuit and a plurality of word line potential control transistors. The threshold voltage detection circuit includes a threshold voltage holding memory cell transistor having a simultaneously processed identical structure as the memory cell transistors and disposed adjacent to the memory cell transistors so as to hold a threshold voltage after ultraviolet light erasing. The threshold voltage detection circuit detects whether a threshold voltage of the threshold voltage holding memory cell transistor is above or below a predetermined reference voltage.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: August 5, 1997
    Assignee: NEC Corporation
    Inventor: Yuuichi Sano