Patents by Inventor Yuuichirou Ikeda
Yuuichirou Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8478654Abstract: A device executes a program including a process stored in a storage device. The process includes obtaining possessed product information of a possessed product of a user, and usage status information which indicates usage of the possessed product, the process product information being based on a request from the user device, obtaining first product information corresponding to the obtained possessed product information and a second product information of a comparison target product, the first product information and the second product information including a content of the possessed product and the comparison target described in a plurality of items, respectively, extracting a prescribed item from among the items of the first product information and second product information based on the obtained usage status information, and transmitting the content based on the content of the first product information and second product information corresponding to the extracted item to the user device.Type: GrantFiled: January 27, 2012Date of Patent: July 2, 2013Assignee: Fujitsu LimitedInventor: Yuuichirou Ikeda
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Patent number: 8441837Abstract: A nonvolatile resistance variable memory device (100) includes memory cells (M11, M12, . . . ) in each of which a variable resistance element (R11, R12, . . . ) including a variable resistance layer placed between and in contact with a first electrode and a second electrode, and a current steering element (D11, D12, . . . ) including a current steering layer placed between and in contact with a third electrode and a fourth electrode, are connected in series, and the device is driven by a first LR drive circuit (105a1) via a current limit circuit (105b) to decrease resistance of the variable resistance element while the device is driven by a second HR drive circuit (105a2) to increase resistance of the variable resistance element, thus using the current limit circuit (105b) to make a current for decreasing resistance of the variable resistance element lower than a current for increasing resistance of the variable resistance element.Type: GrantFiled: April 14, 2010Date of Patent: May 14, 2013Assignee: Panasonic CorporationInventors: Yuuichirou Ikeda, Kazuhiko Shimakawa, Yoshihiko Kanzawa, Shunsaku Muraoka, Ryotaro Azuma
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Publication number: 20120246030Abstract: A device executes a program including a process stored in a storage device. The process includes obtaining possessed product information of a possessed product of a user, and usage status information which indicates usage of the possessed product, the process product information being based on a request from the user device, obtaining first product information corresponding to the obtained possessed product information and a second product information of a comparison target product, the first product information and the second product information including a content of the possessed product and the comparison target described in a plurality of items, respectively, extracting a prescribed item from among the items of the first product information and second product information based on the obtained usage status information, and transmitting the content based on the content of the first product information and second product information corresponding to the extracted item to the user device.Type: ApplicationFiled: January 27, 2012Publication date: September 27, 2012Applicant: FUJITSU LIMITEDInventor: Yuuichirou IKEDA
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Publication number: 20110122680Abstract: A nonvolatile resistance variable memory device (100) includes memory cells (M11, M12, . . . ) in each of which a variable resistance element (R11, R12, . . . ) including a variable resistance layer placed between and in contact with a first electrode and a second electrode, and a current steering element (D11, D12, . . . ) including a current steering layer placed between and in contact with a third electrode and a fourth electrode, are connected in series, and the device is driven by a first LR drive circuit (105a1) via a current limit circuit (105b) to decrease resistance of the variable resistance element while the device is driven by a second HR drive circuit (105a2) to increase resistance of the variable resistance element, thus using the current limit circuit (105b) to make a current for decreasing resistance of the variable resistance element lower than a current for increasing resistance of the variable resistance element.Type: ApplicationFiled: April 14, 2010Publication date: May 26, 2011Inventors: Yuuichirou Ikeda, Kazuhiko Shimakawa, Yoshihiko Kanzawa, Shunsaku Muraoka, Ryotaro Azuma
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Patent number: 7542165Abstract: The movement of an image component is determined using the plot information, such as the position, size of the image component, etc., at each time. The complex movement of each image component can be easily generated by providing a plurality of plot information generating units for each image component and combining a plurality of pieces of plot information generated by the plot information generating units when an image is reproduced.Type: GrantFiled: February 6, 2006Date of Patent: June 2, 2009Assignee: Fujitsu LimitedInventors: Yasuhiro Kawakatsu, Yuuichirou Ikeda
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Patent number: 7509607Abstract: The memory circuit comprises: a single or a plurality of reading-out port(s); a single or a plurality of writing port(s); a crosstalk-glitch suppressor circuit for suppressing crosstalk glitch between internal signal lines of each of the ports; and a control device for controlling capacity of the crosstalk-glitch suppressor circuit.Type: GrantFiled: December 16, 2005Date of Patent: March 24, 2009Assignee: Panasonic CorporationInventor: Yuuichirou Ikeda
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Publication number: 20080068623Abstract: The movement of an image component is determined using the plot information, such as the position, size of the image component, etc., at each time. The complex movement of each image component can be easily generated by providing a plurality of plot information generating units for each image component and combining a plurality of pieces of plot information generated by the plot information generating units when an image is reproduced.Type: ApplicationFiled: October 31, 2007Publication date: March 20, 2008Applicant: Fujitsu LimitedInventors: Yasuhiro Kawakatsu, Yuuichirou Ikeda
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Publication number: 20070103954Abstract: There is provided a memory circuit including a first memory cell mapped on an address space accessible from a processor, and a second memory cell not mapped on the address space and having the same constitution as that of the first memory cell, wherein a control circuit for executing a control function relating to the memory circuit is included, and an output signal line of the second memory cell is connected to the control circuit.Type: ApplicationFiled: November 1, 2006Publication date: May 10, 2007Inventor: Yuuichirou Ikeda
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Patent number: 7164593Abstract: A storage section, at least one writing section, and at least one reading section are provided on a substrate. A storage-section substrate region in which the storage section is formed, at least one writing-section substrate region in which each writing section is formed, at least one reading-section substrate region in which each reading section is formed are insulatedly isolated from each other on the substrate. Independent substrate potentials are applied to each substrate region.Type: GrantFiled: May 21, 2004Date of Patent: January 16, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Yuuichirou Ikeda
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Publication number: 20060187508Abstract: The movement of an image component is determined using the plot information, such as the position, size of the image component, etc., at each time. The complex movement of each image component can be easily generated by providing a plurality of plot information generating units for each image component and combining a plurality of pieces of plot information generated by the plot information generating units when an image is reproduced.Type: ApplicationFiled: February 6, 2006Publication date: August 24, 2006Applicant: FUJITSU LIMITEDInventors: Yasuhiro Kawakatsu, Yuuichirou Ikeda
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Publication number: 20060133170Abstract: The memory circuit comprises: a single or a plurality of reading-out port(s); a single or a plurality of writing port(s); a crosstalk-glitch suppressor circuit for suppressing crosstalk glitch between internal signal lines of each of the ports; and a control device for controlling capacity of the crosstalk-glitch suppressor circuit.Type: ApplicationFiled: December 16, 2005Publication date: June 22, 2006Inventor: Yuuichirou Ikeda
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Patent number: 7031018Abstract: The movement of an image component is determined using the plot information, such as the position, size of the image component, etc., at each time. The complex movement of each image component can be easily generated by providing a plurality of plot information generating units for each image component and combining a plurality of pieces of plot information generated by the plot information generating units when an image is reproduced.Type: GrantFiled: September 29, 2000Date of Patent: April 18, 2006Assignee: Fujitsu LimitedInventors: Yasuhiro Kawakatsu, Yuuichirou Ikeda
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Publication number: 20050193415Abstract: When acquiring electronic program guide (EPG) in digital broadcast receiver apparatus, broadcast receiver apparatus automatically acquires and stores station-specific EPGs while in non-receiving state. When receiver apparatus is in non-receiving state, prescribed transmission path is selected, and all or only desired station-specific EPGs are acquired in sequence. Examples of methods of judging non-receiving state include method of confirming reception of broadcast signals in transmission path selection device, method of confirming output of broadcast play data for watching in display synthesis device, and method of confirming whether power state is standby state.Type: ApplicationFiled: December 6, 2004Publication date: September 1, 2005Applicant: FUJITSU LIMITEDInventor: Yuuichirou Ikeda
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Publication number: 20040232567Abstract: A storage section, at least one writing section, and at least one reading section are provided on a substrate. A storage-section substrate region in which the storage section is formed, at least one writing-section substrate region in which each writing section is formed, at least one reading-section substrate region in which each reading section is formed are insulatedly isolated from each other on the substrate. Independent substrate potentials are applied to each substrate region.Type: ApplicationFiled: May 21, 2004Publication date: November 25, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventor: Yuuichirou Ikeda
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Publication number: 20030033174Abstract: A reservation control unit reserving a receipt or record of a program includes a search request module (11) that requests a program information retaining unit (2) for retaining program information containing a program broadcast date/time and program contents, to search for the program information, a reservation request module (11) that requests a program reservation unit (3) for making a reservation of viewing or recording the program, to reserve viewing or recording the program, and an information obtaining module (11, 12, 13, 14, 15, 16 or 17) for obtaining information related to the program from contents of the program received by a program receiving unit.Type: ApplicationFiled: January 14, 2002Publication date: February 13, 2003Applicant: Fujitsu LimitedInventors: Yuuichirou Ikeda, Yasufumi Nakamura