Patents by Inventor Yuuji Hisazato

Yuuji Hisazato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11088118
    Abstract: According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: August 10, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kazuyasu Takimoto, Yuta Ichikura, Toshiharu Ohbu, Hiroaki Ito, Naotake Watanabe, Nobumitsu Tada, Naoki Yamanari, Daisuke Hiratsuka, Hiroki Sekiya, Yuuji Hisazato, Naotaka Iio, Hitoshi Matsumura
  • Publication number: 20200321320
    Abstract: According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.
    Type: Application
    Filed: November 30, 2017
    Publication date: October 8, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kazuyasu TAKIMOTO, Yuta ICHIKURA, Toshiharu OHBU, Hiroaki ITO, Naotake WATANABE, Nobumitsu TADA, Naoki YAMANARI, Daisuke HIRATSUKA, Hiroki SEKIYA, Yuuji HISAZATO, Naotaka IIO, Hitoshi MATSUMURA
  • Publication number: 20180233464
    Abstract: A semiconductor modules includes insulating substrates having first and second patterns thereon. One terminal plate connects the first patterns and another terminal plate connects the second patterns. A first and a second switching chip are provided on the first pattern. Bonding wires connect the first ans second chips to the second pattern. An insulating plate with an auxillary conductor theron is disposed on the first pattern between the second pattern and both the first and second chips. A first auxiliary connection connect the auxiliary conductor and the second chip and a second auxilliary connection connect thes auxiliary conductor and the second pattern. The auxiliary connections may be, for example, bonding wires or solder connections.
    Type: Application
    Filed: August 28, 2017
    Publication date: August 16, 2018
    Inventors: Nobumitsu TADA, Hiroaki ITO, Kazuya KODANI, Toshiharu OHBU, Hiroki SEKIYA, Yuuji HISAZATO, Hitoshi MATSUMURA
  • Patent number: 9466558
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, amounting substrate which has wiring layers containing copper, and a joining layer which is provided between the semiconductor element and the wiring layer and made of an alloy containing copper and metal other than copper, and in which a melting point of the alloy is higher than a melting point of the metal.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: October 11, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yo Sasaki, Atsushi Yamamoto, Yuuji Hisazato, Hitoshi Matsumura
  • Publication number: 20150262959
    Abstract: A semiconductor device includes a substrate joined to a base by a first junction material and a semiconductor element joined to the substrate by a second junction material. At least one of the first and second junction materials comprises tin, antimony, and cobalt. In some embodiments, the junction materials comprise cobalt having a weight percentage between 0.05 wt % and 0.2 wt %, antimony with a weight percentage between 1 wt % and 10 wt %, and the balance being substantially tin.
    Type: Application
    Filed: September 2, 2014
    Publication date: September 17, 2015
    Inventors: Yuuji HISAZATO, Kazuya KODANI, Yo SASAKI, Daisuke HIRATSUKA, Hitoshi MATSUMURA, Hideaki KITAZAWA, Nobumitsu TADA, Hiroki SEKIYA
  • Publication number: 20150249046
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, amounting substrate which has wiring layers containing copper, and a joining layer which is provided between the semiconductor element and the wiring layer and made of an alloy containing copper and metal other than copper, and in which a melting point of the alloy is higher than a melting point of the metal.
    Type: Application
    Filed: July 31, 2014
    Publication date: September 3, 2015
    Inventors: YO SASAKI, Atsushi Yamamoto, Yuuji Hisazato, Hitoshi Matsumura
  • Patent number: 9123704
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, an interconnection layer, and a bonding layer. The interconnection layer includes Cu. The bonding layer includes a first alloy that is an alloy of Cu and a first metal other than Cu between the semiconductor element and the interconnection layer. A melting point of the first alloy is higher than a melting point of the first metal.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: September 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yo Sasaki, Yuuji Hisazato, Kazuya Kodani, Atsushi Yamamoto, Hitoshi Matsumura
  • Publication number: 20150078414
    Abstract: According to one embodiment, in a method of testing a semiconductor device, the semiconductor device has a semiconductor element and a substrate which are bonded by bonding material including metal fine particles. Image data of a heat distribution in the semiconductor device are temporally acquired while heating the semiconductor device. A time change of a fractal dimension based on the image data is calculated. An inclination of the time change of the fractal dimension is calculated. The inclination and a reference inclination set in advance are compared. Whether or not the semiconductor device is good is determined.
    Type: Application
    Filed: March 3, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuuji Hisazato, Kazuya Kodani, Yo Sasaki, Daisuke Hiratsuka, Hitoshi Matsumura, Hideaki Kitazawa, Kenji Adachi
  • Publication number: 20150076699
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element, an interconnection layer, and a bonding layer. The interconnection layer includes Cu. The bonding layer includes a first alloy that is an alloy of Cu and a first metal other than Cu between the semiconductor element and the interconnection layer. A melting point of the first alloy is higher than a melting point of the first metal.
    Type: Application
    Filed: March 11, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yo Sasaki, Yuuji Hisazato, Kazuya Kodani, Atsushi Yamamoto, Hitoshi Matsumura
  • Publication number: 20150076516
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element and a metal film. The semiconductor element has a first surface and a second surface opposite to the first surface. The metal film is provided above the second surface of the semiconductor element. The metal film includes Cr.
    Type: Application
    Filed: March 10, 2014
    Publication date: March 19, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuuji Hisazato, Hiroki Sekiya, Yo Sasaki, Kazuya Kodani, Nobumitsu Tada, Hitoshi Matsumura, Tomohiro Iguchi
  • Patent number: 8957522
    Abstract: According to one embodiment, the semiconductor device in the embodiment has an assembly substrate, a semiconductor chip, and a jointing layer. The semiconductor chip is joined to the assembly substrate via the jointing layer. An intervening diffusion barrier layer may be interposed between the chip and jointing layer. The jointing layer is an alloy layer mainly made of any metal selected from Sn, Zn and In or an alloy of Sn, Zn and In, and any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V or an alloy of any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V and any metal selected from Sn, Zn and In, where the alloy has a higher melting temperature than that of Sn, Zn and In or an alloy of Sn, Zn and/or In.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: February 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yo Sasaki, Daisuke Hiratsuka, Atsushi Yamamoto, Kazuya Kodani, Yuuji Hisazato, Hitoshi Matsumura
  • Publication number: 20140284797
    Abstract: A method for fabricating a power semiconductor device that comprises a base substrate with a conductive layer on a surface of the base substrate and semiconductor components mounted on the base substrate includes forming a hardened layer on the surface of the conductive layer before mounting a semiconductor component on the base substrate. The forming of the hardened layer may optionally be performed using a peening process, for example, a shot peening process, a laser peening process, or an ultrasonic peening process. The conductive layer may comprise a metal such as, for example, aluminum or copper.
    Type: Application
    Filed: September 3, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuuji HISAZATO, Hiroki SEKIYA, Yo SASAKI, Kazuya KODANI, Nobumitsu TADA, Hitoshi MATSUMURA, Tomohiro IGUCHI
  • Publication number: 20140077377
    Abstract: According to one embodiment, the semiconductor device in the embodiment has an assembly substrate, a semiconductor chip, and a jointing layer. The semiconductor chip is joined to the assembly substrate via the jointing layer. An intervening diffusion barrier layer may be interposed between the chip and jointing layer. The jointing layer is an alloy layer mainly made of any metal selected from Sn, Zn and In or an alloy of Sn, Zn and In, and any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V or an alloy of any metal selected from Cu, Ni, Ag, Cr, Zr, Ti and V and any metal selected from Sn, Zn and In, where the alloy has a higher melting temperature than that of Sn, Zn and In or an alloy of Sn, Zn and/or In.
    Type: Application
    Filed: March 6, 2013
    Publication date: March 20, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yo SASAKI, Daisuke HIRATSUKA, Atsushi YAMAMOTO, Kazuya KODANI, Yuuji HISAZATO, Hitoshi MATSUMURA
  • Patent number: 8641286
    Abstract: A composite bearing member 10 includes: a bearing sliding material 20 whose surface contacts a rotating portion; a bearing base material 30 made of a material different from a material constituting the bearing sliding material 20; and a joining layer 40 joining the bearing sliding material 20 and the bearing base material 30. Further, the bearing sliding material 20 has a sliding layer 50 sliding the rotating portion on a surface. Furthermore, the bearing sliding material 20 has, between the sliding layer 50 and the joining layer 40, a composition graded layer 60 which dispersedly contains the same metal material as a metal material constituting the joining layer 40 and in which a content of the metal material is increased toward the joining layer 40.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: February 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Than Trong Long, Yuuji Hisazato, Satoshi Namba, Kazuma Mukai
  • Publication number: 20110091351
    Abstract: A bonding composition (12) contains 0.01-1 wt % of Ge and 0.01 to 1 wt % of Si, and a balance of a Sn alloy. The bonding composition (12) has excellent bonding strength.
    Type: Application
    Filed: August 18, 2008
    Publication date: April 21, 2011
    Inventors: Than Trong Long, Yuuji Hisazato
  • Publication number: 20110026864
    Abstract: A sliding material includes a sliding surface member, a base member made of a material different from the sliding surface member, a bonding material layer disposed between the sliding surface member and the base member so as to bond the sliding surface member and the base member, and a sheet member made of an electromagnetic induction heating material. The sliding material is manufactured by bonding the sliding surface member and the base member by heating and melting the bonding material layer through electromagnetic induction heating of the sheet member.
    Type: Application
    Filed: March 26, 2009
    Publication date: February 3, 2011
    Inventors: Long Than Trong, Yuuji Hisazato, Satoshi Namba, Kazuma Mukai
  • Publication number: 20100124388
    Abstract: A composite bearing member 10 includes: a bearing sliding material 20 whose surface contacts a rotating portion; a bearing base material 30 made of a material different from a material constituting the bearing sliding material 20; and a joining layer 40 joining the bearing sliding material 20 and the bearing base material 30. Further, the bearing sliding material 20 has a sliding layer 50 sliding the rotating portion on a surface. Furthermore, the bearing sliding material 20 has, between the sliding layer 50 and the joining layer 40, a composition graded layer 60 which dispersedly contains the same metal material as a metal material constituting the joining layer 40 and in which a content of the metal material is increased toward the joining layer 40.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 20, 2010
    Inventors: Than Trong Long, Yuuji Hisazato, Satoshi Namba, Kazuma Mukai
  • Patent number: 7361272
    Abstract: The present invention is to provide an anisotropic porous material for a fluid filter which can perform a separation process of a large amount of fluid with high accuracy, which can achieve high flux, and which can improve detergent properties. The anisotropic porous material includes a plurality of pores. Each of the pores has an anisotropic shape in which a major axis and a minor axis can be defined. An arrangement of the pores has an orientation.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: April 22, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneji Kameda, Yoshiyasu Ito, Takahiko Shindo, Yuuji Hisazato
  • Publication number: 20070178007
    Abstract: This invention provides lead-free solders that have excellent oxidation resistance and can be plastically worked easily and well. The lead-free solders and molded products of the lead-free solders can provide solder joint products, particularly electronic components, which are highly reliable, for example, in mechanical strength and joint strength. The lead-free solders, solder joint product, and electronic component are as follows. A lead-free solder comprising a tin (Sn)-base alloy having a tantalum (Ta) content of not less than 0.005% by weight and not more than 2.0% by weight. A lead-free solder comprising a tin (Sn)-base alloy comprising not less than 0.005% by weight and not more than 2.0% by weight of tantalum (Ta) and not less than 0.1% by weight and not more than 10.0% by weight of zinc (Zn) with the balance consisting of tin (Sn) and unavoidable impurities. A lead-free solder comprising a tin (Sn)-base alloy comprising not less than 0.005% by weight and not more than 2.
    Type: Application
    Filed: December 27, 2006
    Publication date: August 2, 2007
    Inventors: Long Thantrong, Yuuji Hisazato
  • Publication number: 20070104941
    Abstract: The present invention is to provide an anisotropic porous material for a fluid filter which can perform a separation process of a large amount of fluid with high accuracy, which can achieve high flux, and which can improve detergent properties. The anisotropic porous material includes a plurality of pores. Each of the pores has an anisotropic shape in which a major axis and a minor axis can be defined. An arrangement of the pores has an orientation.
    Type: Application
    Filed: November 6, 2006
    Publication date: May 10, 2007
    Inventors: Tsuneji Kameda, Yoshiyasu Ito, Takahiro Shindo, Yuuji Hisazato