Patents by Inventor Yuuki Koide

Yuuki Koide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Percutaneous absorption enhancer and transdermal preparation using the same
    Patent number: 8771724
    Abstract: Provided are a percutaneous absorption enhancer excellent in an enhancing effect on percutaneous absorption of a wide range of drugs and excellent in compatibility with an adhesive base, and a transdermal preparation using the percutaneous absorption enhancer. The percutaneous absorption enhancer includes a sulfosuccinate or a salt thereof and an alkyl glycoside or an alkyl thioglycoside.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: July 8, 2014
    Assignee: TOA EIYO Ltd.
    Inventors: Naoto Ohtake, Yuuki Koide
  • PERCUTANEOUS ABSORPTION ENHANCER AND TRANSDERMAL PREPARATION USING THE SAME
    Publication number: 20110104241
    Abstract: Provided are a percutaneous absorption enhancer excellent in an enhancing effect on percutaneous absorption of a wide range of drugs and excellent in compatibility with an adhesive base, and a transdermal preparation using the percutaneous absorption enhancer. The percutaneous absorption enhancer includes a sulfosuccinate or a salt thereof and an alkyl glycoside or an alkyl thioglycoside.
    Type: Application
    Filed: June 22, 2009
    Publication date: May 5, 2011
    Applicant: TOA EIYO LTD.
    Inventors: Naoto Ohtake, Yuuki Koide
  • Process for producing semiconductor integrated circuit
    Patent number: 5780328
    Abstract: When the source and drain regions (an n.sup.- type semiconductor region and an n.sup.+ type semiconductor region) of a complementary MISFET and a p-type semiconductor region for use as a punch-through stopper are formed in a p-type well in a substrate having a p- and an n-type well, p-type impurities for the punch-through stopper are suppressed from being supplied to the feeding portion (an n.sup.+ type semiconductor region) of the n-type well.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: July 14, 1998
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Co., Ltd.
    Inventors: Kazushi Fukuda, Yasuko Yoshida, Yutaka Hoshino, Naotaka Hashimoto, Kyoichiro Asayama, Yuuki Koide, Keiichi Yoshizumi, Eri Okamoto, Satoru Haga, Shuji Ikeda