Abstract: The present technology relates to an image pickup element, a control method, and an image pickup device which realize easier and more diversified data output. In one aspect of the present technology, a plurality of signal lines for transmitting a pixel signal read from a pixel is allocated to each column, and different reading modes of the pixel signals are respectively allocated to the signal lines of each column. Regarding each column of the pixel array connected to the pixel corresponding to the mode, the pixel signal is read from the pixel connected to the signal line corresponding to the reading mode of the pixel signal in the mode, and the read pixel signal is transmitted via the signal line. The present technology is applied to, for example, an image pickup element and an image pickup device.

Abstract: The present technology relates to an image pickup element, a control method, and an image pickup device which realize easier and more diversified data output. In one aspect of the present technology, a plurality of signal lines for transmitting a pixel signal read from a pixel is allocated to each column, and different reading modes of the pixel signals are respectively allocated to the signal lines of each column. Regarding each column of the pixel array connected to the pixel corresponding to the mode, the pixel signal is read from the pixel connected to the signal line corresponding to the reading mode of the pixel signal in the mode, and the read pixel signal is transmitted via the signal line. The present technology is applied to, for example, an image pickup element and an image pickup device.

Abstract: The present technology relates to an image pickup element, a control method, and an image pickup device which realize easier and more diversified data output. In one aspect of the present technology, a plurality of signal lines for transmitting a pixel signal read from a pixel is allocated to each column, and different reading modes of the pixel signals are respectively allocated to the signal lines of each column. Regarding each column of the pixel array connected to the pixel corresponding to the mode, the pixel signal is read from the pixel connected to the signal line corresponding to the reading mode of the pixel signal in the mode, and the read pixel signal is transmitted via the signal line. The present technology is applied to, for example, an image pickup element and an image pickup device.

Abstract: An electronic apparatus includes: a reference-signal output section that outputs a reference signal; a comparator that compares an electrical signal output from a pixel with the reference signal; a counter that obtains a count value as an AD conversion result of the electrical signal, the count value being obtained by counting time taken for the reference signal to change until the electrical signal and the reference signal match each other; and an auto-zero control section that performs control so that auto zero processing for setting the comparator is completed in a reset period, in which the pixel is reset, so that a comparison result indicating that two input signals supplied to the comparator match each other.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: An electronic apparatus includes: a reference-signal output section that outputs a reference signal; a comparator that compares an electrical signal output from a pixel with the reference signal; a counter that obtains a count value as an AD conversion result of the electrical signal, the count value being obtained by counting time taken for the reference signal to change until the electrical signal and the reference signal match each other; and an auto-zero control section that performs control so that auto zero processing for setting the comparator is completed in a reset period, in which the pixel is reset, so that a comparison result indicating that two input signals supplied to the comparator match each other.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: A solid-state imaging apparatus includes a comparator for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, an analog-digital converter for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparator; a reset signal generator for generating a reset signal that triggers a reset operation to be input to the comparator in order to adjust the reference in the analog-digital converter, and a waveform processor provided between the reset signal generator and the comparator for increasing the degree of dullness of a waveform of the reset signal.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: An imaging device includes: a pixel section having a plurality of pixel circuits arranged in a matrix form; and a signal processing section that processes an output signal read from the pixel section. The pixel section includes a first output signal line, at least one first color pixel circuit connected to the first output signal line, a second output signal line, and at least one second color pixel circuit adjacent to the first color pixel circuit in a row direction thereof and connected to the second output signal line. The signal processing section includes a first signal processing circuit, a second signal processing circuit, a selection circuit, a first current source, a second current source, a current source selection circuit, a first connection node, and a second connection node.

Abstract: A solid-state imaging apparatus includes a comparator for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, an analog-digital converter for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparator; a reset signal generator for generating a reset signal that triggers a reset operation to be input to the comparator in order to adjust the reference in the analog-digital converter, and a waveform processor provided between the reset signal generator and the comparator for increasing the degree of dullness of a waveform of the reset signal.

Abstract: A solid-state imaging apparatus includes comparing means for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, analog-digital converting means for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparing means, reset signal generating means for generating a reset signal that triggers a reset operation to be input to the comparing means in order to adjust the reference in the analog-digital converting means, and waveform processing means provided between the reset signal generating means and the comparing means for increasing the degree of dullness of a waveform of the reset signal.

Abstract: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become ?W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

Abstract: An imaging device includes: a pixel section having a plurality of pixel circuits arranged in a matrix form; and a signal processing section that processes an output signal read from the pixel section. The pixel section includes a first output signal line, at least one first color pixel circuit connected to the first output signal line, a second output signal line, and at least one second color pixel circuit adjacent to the first color pixel circuit in a row direction thereof and connected to the second output signal line. The signal processing section includes a first signal processing circuit, a second signal processing circuit, a selection circuit, a first current source, a second current source, a current source selection circuit, a first connection node, and a second connection node.

Abstract: A solid-state imaging apparatus includes comparing means for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, analog-digital converting means for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparing means, reset signal generating means for generating a reset signal that triggers a reset operation to be input to the comparing means in order to adjust the reference in the analog-digital converting means, and waveform processing means provided between the reset signal generating means and the comparing means for increasing the degree of dullness of a waveform of the reset signal.