Patents by Inventor Yuushin Kimura

Yuushin Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor testing circuit, semiconductor testing jig, semiconductor testing apparatus, and semiconductor testing method
    Patent number: 8736295
    Abstract: A signal processing section included in a semiconductor testing circuit supplies a test signal inputted from a tester via a signal line to a plurality of DUTs and generates a test result by synthesizing response signals transmitted from the plurality of DUTs on the basis of the test signal. A test result output section included in the semiconductor testing circuit makes a voltage level of the test result differ from a voltage level of the test signal inputted and outputs the test result to the tester via the signal line.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: May 27, 2014
    Assignees: Fujitsu Limited, Fujitsu Semiconductor Limited
    Inventors: Yuichi Watanabe, Kiyotaka Shinada, Yuushin Kimura, Shigeru Goto, Yasuhiko Tandou, Eiji Takada, Kouji Uesaka
  • SEMICONDUCTOR TESTING CIRCUIT, SEMICONDUCTOR TESTING JIG, SEMICONDUCTOR TESTING APPARATUS, AND SEMICONDUCTOR TESTING METHOD
    Publication number: 20110057681
    Abstract: A signal processing section included in a semiconductor testing circuit supplies a test signal inputted from a tester via a signal line to a plurality of DUTs and generates a test result by synthesizing response signals transmitted from the plurality of DUTs on the basis of the test signal. A test result output section included in the semiconductor testing circuit makes a voltage level of the test result differ from a voltage level of the test signal inputted and outputs the test result to the tester via the signal line.
    Type: Application
    Filed: September 1, 2010
    Publication date: March 10, 2011
    Applicants: FUJITSU LIMITED, FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Yuichi Watanabe, Kiyotaka Shinada, Yuushin Kimura, Shigeru Goto, Yasuhiko Tandou, Eiji Takada, Kouji Uesaka
  • Semiconductor apparatus testing arrangement and semiconductor apparatus testing method
    Patent number: 7355421
    Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: April 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Yoshikazu Arisaka, Kazuhiro Tashiro, Takayuki Katayama, Tetsu Ozawa, Yuushin Kimura
  • Semiconductor apparatus testing arrangement and semiconductor apparatus testing method
    Publication number: 20070096761
    Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.
    Type: Application
    Filed: January 26, 2006
    Publication date: May 3, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Shigeyuki Maruyama, Yoshikazu Arisaka, Kazuhiro Tashiro, Takayuki Katayama, Tetsu Ozawa, Yuushin Kimura