Abstract: A digital signal corresponding to each pixel of a liquid crystal display (LCD) is converted into an analog signal by a digital-to-analog (D-A) converting section. A CCD (Charge Coupled Device) delay line sequentially transfers the received analog signal according to a transfer clock signal. In response to a drive control signal, a signal output section receives the analog signal from the CCD delay line for output as a pixel signal of the LCD. The above structure eliminates the need to provide a multiplicity of D-A converters corresponding to the number of pixels per scanning line.