Patents by Inventor Yuuya Miyoshi

Yuuya Miyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180249107
    Abstract: A semiconductor integrated circuit includes multiple signal processing circuits including a constant current source, a first bias source that generates first bias voltage, a second bias source that generates second bias voltage, a first bias circuit that supplies a first reference current to the first bias source, a second bias circuit that supplies a second reference current to the second bias source, a bias wiring that supplies the first bias voltage and the second bias voltage to a plurality of gates of a transistor that constructs the constant current source, a power source wiring that supplies a power source voltage to each of the first bias source, the second bias source, and the constant current source, a first voltage supplying source that applies a first power source voltage to the power source wiring, and a second voltage supplying that applies a second power source voltage to the power source wiring.
    Type: Application
    Filed: April 26, 2018
    Publication date: August 30, 2018
    Applicant: RICOH COMPANY, LTD.
    Inventors: Sho KAMEZAWA, Tohru KANNO, Yuuya MIYOSHI
  • Patent number: 9986185
    Abstract: A semiconductor integrated circuit includes multiple signal processing circuits including a constant current source, a first bias source that generates first bias voltage, a second bias source that generates second bias voltage, a first bias circuit that supplies a first reference current to the first bias source, a second bias circuit that supplies a second reference current to the second bias source, a bias wiring that supplies the first bias voltage and the second bias voltage to a plurality of gates of a transistor that constructs the constant current source, a power source wiring that supplies a power source voltage to each of the first bias source, the second bias source, and the constant current source, a first voltage supplying source that applies a first power source voltage to the power source wiring, and a second voltage supplying that applies a second power source voltage to the power source wiring.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: May 29, 2018
    Assignee: RICOH COMPANY, LTD.
    Inventors: Sho Kamezawa, Tohru Kanno, Yuuya Miyoshi
  • Patent number: 9781278
    Abstract: A solid-state imaging device includes a pixel circuit including a plurality of photoelectric conversion elements and configured to output a signal level and a reset level, an analog correlated double sampling (CDS) circuit connected to the pixel circuit and configured to perform correlated double sampling in an analog region based on the signal level and the reset level and output a result of the correlated double sampling, an analog-digital (AD) conversion circuit connected to the analog CDS circuit and configured to convert two different analog signals output from the analog CDS circuit into two digital signals, a signal processing circuit connected to the AD conversion circuit and configured to obtain a difference between the two different digital signals output from the AD conversion circuit; and a reference voltage generating circuit to output a first reference voltage that defines a clamp level of the analog CDS circuit.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: October 3, 2017
    Assignee: Ricoh Company, Ltd.
    Inventors: Yuuya Miyoshi, Tohru Kanno
  • Publication number: 20170272742
    Abstract: A solid-state image sensor includes a pixel unit having a plurality of pixels arranged in matrix, a read signal processing circuit, a test signal output circuit, a test signal generating circuit, and a control circuit that controls operations of the above mentioned circuits. Each of the plurality of pixels outputs a pixel signal that is obtained by amplifying a photoelectrically converted signal using an output amplifier in one or more pixel units. The read signal processing circuit reads the pixel signal output from the pixel unit in units of one or more pixels to a corresponding signal line and processes the pixel signal. The test signal output circuit, having a test output amplifier for each signal line, outputs a signal from the test output amplifier to the signal line in response to a test signal input to the test output amplifier. The test signal generating circuit generates the test signal.
    Type: Application
    Filed: March 6, 2017
    Publication date: September 21, 2017
    Applicant: RICOH COMPANY, LTD.
    Inventors: Atsushi SUZUKI, Tohru KANNO, Yuuya MIYOSHI
  • Publication number: 20170264844
    Abstract: A semiconductor integrated circuit includes multiple signal processing circuits including a constant current source, a first bias source that generates first bias voltage, a second bias source that generates second bias voltage, a first bias circuit that supplies a first reference current to the first bias source, a second bias circuit that supplies a second reference current to the second bias source, a bias wiring that supplies the first bias voltage and the second bias voltage to a plurality of gates of a transistor that constructs the constant current source, a power source wiring that supplies a power source voltage to each of the first bias source, the second bias source, and the constant current source, a first voltage supplying source that applies a first power source voltage to the power source wiring, and a second voltage supplying that applies a second power source voltage to the power source wiring.
    Type: Application
    Filed: March 2, 2017
    Publication date: September 14, 2017
    Applicant: RICOH COMPANY, LTD.
    Inventors: Sho KAMEZAWA, Tohru KANNO, Yuuya MIYOSHI
  • Publication number: 20170244844
    Abstract: A solid-state imaging device includes a pixel circuit including a plurality of photoelectric conversion elements and configured to output a signal level and a reset level, an analog correlated double sampling (CDS) circuit connected to the pixel circuit and configured to perform correlated double sampling in an analog region based on the signal level and the reset level and output a result of the correlated double sampling, an analog-digital (AD) conversion circuit connected to the analog CDS circuit and configured to convert two different analog signals output from the analog CDS circuit into two digital signals, a signal processing circuit connected to the AD conversion circuit and configured to obtain a difference between the two different digital signals output from the AD conversion circuit; and a reference voltage generating circuit to output a first reference voltage that defines a clamp level of the analog CDS circuit.
    Type: Application
    Filed: January 20, 2017
    Publication date: August 24, 2017
    Inventors: Yuuya MIYOSHI, Tohru KANNO
  • Publication number: 20170171483
    Abstract: An image capturing device includes a pixel circuit, a programmable-gain amplifier, an analog-to-digital conversion circuit, and a control circuit. The pixel circuit outputs a photoreception signal. The programmable-gain amplifier amplifies the photoreception signal with a first gain. The analog-to-digital conversion circuit further amplifies the amplified signal that has been amplified by the programmable-gain amplifier, with a second gain by having a circuit configuration changeable by control, and digitally converts the resultant signal. The control circuit controls the analog-to-digital conversion circuit.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 15, 2017
    Inventors: Yuusuke KUDOH, Yuuya MIYOSHI
  • Publication number: 20160358958
    Abstract: A solid-state imaging device includes a photoelectric converter including a plurality of light receiving elements arranged along one direction in correspondence with each color of received light, each light receiving element generating an electric charge corresponding to an amount of received light, an electric charge storage unit including a plurality of capacitors storing the electric charges generated by the respective light receiving elements, and a signal processing unit configured to process each of the electric charges stored by the plurality of capacitors as a signal. The electric charge storage unit is disposed so as to oppose the signal processing unit across the photoelectric converter.
    Type: Application
    Filed: May 19, 2016
    Publication date: December 8, 2016
    Applicant: Ricoh Company, Ltd.
    Inventors: Yuuya MIYOSHI, Tohru KANNO
  • Patent number: 9131183
    Abstract: A signal processing circuit 4 includes a clock circuit 24 which generates a clock signal which has been subjected to spread spectrum modulation and supplies the clock signal to a photoelectric conversion element; a AD converter 15 which performs AD conversion on an image signal obtained by the photoelectric conversion element; a noise detecting circuit 21 which detects a noise amplitude of a noise signal that is caused by the spread spectrum modulation of the clock signal and is included in the image signal which has been AD converted; and an analog correction circuit 23 and an digital correction circuit 22 that calculate a correction factor based on the noise amplitude, generate a correction signal by multiplying the digital modulation signal by the correction factor, and superimpose the correction signal onto the image signal at an input side or an output side of the AD converter.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: September 8, 2015
    Assignee: RICOH COMPANY, LTD.
    Inventors: Yuuya Miyoshi, Tohru Kanno
  • Publication number: 20130162870
    Abstract: A signal processing circuit 4 includes a clock circuit 24 which generates a clock signal which has been subjected to spread spectrum modulation and supplies the clock signal to a photoelectric conversion element; a AD converter 15 which performs AD conversion on an image signal obtained by the photoelectric conversion element; a noise detecting circuit 21 which detects a noise amplitude of a noise signal that is caused by the spread spectrum modulation of the clock signal and is included in the image signal which has been AD converted; and an analog correction circuit 23 and an digital correction circuit 22 that calculate a correction factor based on the noise amplitude, generate a correction signal by multiplying the digital modulation signal by the correction factor, and superimpose the correction signal onto the image signal at an input side or an output side of the AD converter.
    Type: Application
    Filed: September 8, 2011
    Publication date: June 27, 2013
    Inventors: Yuuya Miyoshi, Tohru Kanno