Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes forming first channel structures, second channel structures, and third channel structures. The method also includes forming gate dielectric layers surrounding the first channel structures, the second channel structures, and the third channel structures and forming dipole layers over the gate dielectric layers. The method also includes forming a dummy material in a first space between the first and the second channel structures and in a second space between the second and the third channel structures and removing first portions of the dummy material. The method also includes implanting first dopants in the dummy material in the first space and removing second portions of the dummy material in the first space and the second space. The method also includes removing the dipole layers in the top device region and completely removing the dummy material.

Abstract: In an embodiment, a device includes: lower semiconductor nanostructures including a first semiconductor material; a lower epitaxial source/drain region adjacent the lower semiconductor nanostructures, the lower epitaxial source/drain region having a first conductivity type; upper semiconductor nanostructures including a second semiconductor material, the second semiconductor material different from the first semiconductor material; and an upper epitaxial source/drain region adjacent the upper semiconductor nanostructures, the upper epitaxial source/drain region having a second conductivity type, the second conductivity type being opposite the first conductivity type.

Abstract: A method for manufacturing a semiconductor structure includes forming a plurality of semiconductor stack portions spaced apart from each other by a plurality of recesses, each of which includes two sacrificial layer portions and a channel layer portion disposed therebetween, in which the channel layer portion has a plurality of crystal planes and is formed with a first straight lateral surface which is aligned with one of the crystal planes that has a lowest etching rate for an etchant to be used for laterally etching the channel layer portion among those of the crystal planes of the channel layer portion which are able to expose to the recesses; and laterally etching the channel layer portion using the etchant to permit the channel layer portion to be formed with a second straight lateral surface.

Abstract: An apparatus includes a supporting frame, a platform supported by the supporting frame and having a first side and a second side opposite to the first side, and at least three robot fingers which are mounted to the supporting frame, and which are angularly displaced from each other. Each of the robot fingers has a fingertip configured to retain a substrate on the first side of the platform such that the substrate is spaced apart from the platform. A method for manufacturing a semiconductor structure using the apparatus is also disclosed.

Abstract: A semiconductor structure includes a first fin structure and a second fin structure, a first dielectric layer disposed over the first fin structure, a second dielectric layer disposed over the second fin structure, a first gate electrode disposed over the first dielectric layer, and a second gate electrode disposed over the second dielectric layer. A thickness of the first dielectric layer and a thickness of the second dielectric layer are equal. The second fin structure includes an outer region and an inner region, and a Ge concentration in the outer portion is less than Ge concentration in the inner portion.

Abstract: Provided are a semiconductor device and a method of forming the same. The semiconductor device includes a semiconductor device. The semiconductor device includes a substrate including a plurality of fins, a plurality of semiconductor nanosheets stacked on the plurality of fins, a plurality of gate stacks wrapping the plurality of semiconductor nanosheets, an isolation structure around the plurality of fins, and a separator structure on the isolation structure to separate the plurality of gate stacks from each other. The separator structure includes a body and a cap on the body. The cap includes a first portion and a second portion. Sidewalls and bottom of the second portion is wrapped by the first portion.

Abstract: A method includes: applying a first solution to a semiconductor structure of a semiconductor device to form a first coating, the semiconductor structure including a feature and the trench, the first coating being formed in the trench and over the feature, the first solution containing a metal-containing solute; heating the first coating in a multi-step procedure to turn the first coating into a first film, the multi-step procedure including heating at a first temperature, followed by heating at a second temperature not lower than the first temperature; applying a second solution onto the first film to form a second coating, the second solution containing the metal-containing solute; and heating the second coating in a multi-step procedure to turn the second coating into a second film, the multi-step procedure including heating at a third temperature, followed by heating at a fourth temperature not lower than the third temperature.

Abstract: A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

Abstract: An integrated circuit device is provided that includes a first fin structure and a second fin structure extending from a substrate. The first fin structure is a first composition, and includes rounded corners. The second fin structure is a second composition, different than the first composition. A first interface layer is formed directly on the first fin structure including the rounded corners and a second interface layer directly on the second fin structure. The first interface layer is an oxide of the first composition and the second interface layer is an oxide of the second composition. A gate dielectric layer is formed over the first interface layer and the second interface layer.

Abstract: A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

Abstract: An integrated circuit device is provided that includes a first fin structure and a second fin structure extending from a substrate. The first fin structure is a first composition, and includes rounded corners. The second fin structure is a second composition, different than the first composition. A first interface layer is formed directly on the first fin structure including the rounded corners and a second interface layer directly on the second fin structure. The first interface layer is an oxide of the first composition and the second interface layer is an oxide of the second composition. A gate dielectric layer is formed over the first interface layer and the second interface layer.

Abstract: A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

Abstract: A method includes providing a channel region and growing an oxide layer on the channel region. Growing the oxide layer includes introducing a first source gas providing oxygen and introducing a second source gas providing hydrogen. The second source gas being different than the first source gas. The growing the oxide layer is grown by bonding the oxygen to a semiconductor element of the channel region to form the oxide layer and bonding the hydrogen to the semiconductor element of the channel region to form a semiconductor hydride byproduct. A gate dielectric layer and electrode can be formed over the oxide layer.

Abstract: A method includes providing a channel region and growing an oxide layer on the channel region. Growing the oxide layer includes introducing a first source gas providing oxygen and introducing a second source gas providing hydrogen. The second source gas being different than the first source gas. The growing the oxide layer is grown by bonding the oxygen to a semiconductor element of the channel region to form the oxide layer and bonding the hydrogen to the semiconductor element of the channel region to form a semiconductor hydride byproduct. A gate dielectric layer and electrode can be formed over the oxide layer.

Abstract: A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

Abstract: The invention relates to a catalyst, to the use thereof for the electrochemical conversion of methane to methanol and for the direct electrochemical conversion of methane to CO2. The invention also relates to an electrode, in particular for a fuel cell including such a catalyst, as well as to a method for manufacturing such an electrode. The invention further relates to a fuel cell including the catalyst or the electrode. The catalyst according to the invention includes a platinum precursor (II), and optionally a metal-ion precursor M supported by particles of a heteropolyanion (HPA). The invention can be used in particular in the field of the electrochemical oxidation of methane into methanol or CO2.

Abstract: The invention relates to a catalyst, to the use thereof for the electrochemical conversion of methane to methanol and for the direct electrochemical conversion of methane to CO2. The invention also relates to an electrode, in particular for a fuel cell including such a catalyst, as well as to a method for manufacturing such an electrode. The invention further relates to a fuel cell including said catalyst or said electrode. The catalyst according to the invention includes a platinum precursor (II), and optionally a metal-ion precursor M supported by particles of a heteropolyanion (HPA). The invention can be used in particular in the field of the electrochemical oxidation of methane into methanol or CO2.

Abstract: A motion-detecting module includes a PCB, a light-emitting unit, and a light-sensing unit. The light-emitting unit is electrically disposed over the PCB. The light-sensing unit has a light-sensing die electrically disposed on the PCB and a package cover covered on the light-sensing die, and the package cover has a through hole corresponding to the light-sensing die and a transparent element disposed in the through hole. The present invention does not need extra package protection body of the prior art for protecting the light-sensing die during the transport of the light-sensing module. The present invention use original package cover to prevent the light-sensing die from being damaged by external force, and the original package cover shelters the light-sensing die from extra stray light.

Abstract: An improved packaging module of an optical sensor includes a circuit board and an optical sensor module. The optical sensor module comprises a linear optical sensor, and an illuminating unit respectively electronically connected with the circuit board, and a second protective body packaging the linear optical sensor and the illuminating unit. A first protective body covers the linear optical sensor and illuminating unit, the second protective body defines a first aperture corresponding to the linear optical sensor and a second aperture corresponding to the illuminating unit. A first light pipe set at the first aperture and a second light pipe set at the second aperture, the linear optical sensor, illuminating unit, first protective body and second protective body are combined integrally, which makes the packaging module process simple, adjustment of the optical sensor module's components achieved automatically, and the space of the optical sensor is reduced.

Abstract: A motion detecting device for sensing rotation and inclination variation information, includes a light-emitting unit, a sensor control unit, an image sensing unit, a rotation-sensing unit, an inclination-sensing unit, a data storing unit, and an operation unit. The image sensing unit is used to receive a light-reflecting signal. The rotation-sensing unit is used to sense a rotation variation signal of the motion detecting device. The inclination-sensing unit is used to sense an inclination variation signal of the motion detecting device. The operation unit is used to calculate a motion direction and a motion velocity of the motion detecting device relative to a motion surface according to the light-reflecting signal from the image-sensing unit, a rotation angle of the motion detecting device according to the rotation variation signal, and an inclination angle of the motion detecting device according to the inclination variation signal.