Patents by Inventor Yuya IMOTO

Yuya IMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230263366
    Abstract: There is provided an examination support device that is used by being connected to an endoscope system including a camera unit for being inserted into an inside of a body of a subject, the examination support device including an acquisition unit for sequentially acquiring an image signal that the endoscope system provides to an external device; a detection unit for detecting a difference between successive frame images in relation to frame images that are sequentially generated from the image signals; and an establishing unit for establishing an image region indicating a captured image that is captured by the camera unit, based on a region of change where an amount of difference of the difference detected by the detection unit is equal to or greater than a reference amount.
    Type: Application
    Filed: March 23, 2023
    Publication date: August 24, 2023
    Inventors: Yuya IMOTO, Shinichi FUCHITA
  • Patent number: 10931485
    Abstract: An adaptive equalization circuit includes: a first filter configure to perform filtering on an input signal based on a tap coefficient; an applying circuit configured to apply, to the signal, noise outside a band of the signal; and a controller configured to set, for the first filter, the tap coefficient that compensates for transmission line characteristics of the signal, based on the signal to which the noise is applied by the applying circuit.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: February 23, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Yuya Imoto, Kazuhiko Hatae, Nobukazu Koizumi, Yasuo Ohtomo, Masashi Sato, Daisuke Sasaki
  • Publication number: 20200267030
    Abstract: An adaptive equalization circuit includes: a first filter configure to perform filtering on an input signal based on a tap coefficient; an applying circuit configured to apply, to the signal, noise outside a band of the signal; and a controller configured to set, for the first filter, the tap coefficient that compensates for transmission line characteristics of the signal, based on the signal to which the noise is applied by the applying circuit.
    Type: Application
    Filed: January 3, 2020
    Publication date: August 20, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Yuya IMOTO, KAZUHIKO HATAE, Nobukazu KOIZUMI, Yasuo OHTOMO, Masashi Sato, Daisuke SASAKI
  • Patent number: 10560199
    Abstract: A signal processing circuit includes: a processor configured to adjust phases of reception samples which is supplied at a supply interval, according to a phase adjustment amount; and a processing circuit including a finite impulse response (FIR) filter with taps and configured to process, by the FIR filter, each of the reception samples and output output symbols at an output interval different from the supply interval, the processor is configured to: derive initial values of tap coefficients for the respective taps; and derive the phase adjustment amount such that a center of centroids of the tap coefficients at respective output time points of the output symbols coincides with a center of a number of taps of the FIR filter, the tap coefficients at respective output time points of the output symbols being set according to a deviation between the supply interval and the output interval and the initial values.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: February 11, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yuya Imoto, Kazuhiko Hatae, Nobukazu Koizumi, Yasuo Ohtomo, Masato Oota, Masashi Sato, Daisuke Sasaki
  • Publication number: 20190280779
    Abstract: A signal processing circuit includes: a processor configured to adjust phases of reception samples which is supplied at a supply interval, according to a phase adjustment amount; and a processing circuit including a finite impulse response (FIR) filter with taps and configured to process, by the FIR filter, each of the reception samples and output output symbols at an output interval different from the supply interval, the processor is configured to: derive initial values of tap coefficients for the respective taps; and derive the phase adjustment amount such that a center of centroids of the tap coefficients at respective output time points of the output symbols coincides with a center of a number of taps of the FIR filter, the tap coefficients at respective output time points of the output symbols being set according to a deviation between the supply interval and the output interval and the initial values.
    Type: Application
    Filed: January 24, 2019
    Publication date: September 12, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yuya IMOTO, KAZUHIKO HATAE, Nobukazu KOIZUMI, Yasuo OHTOMO, Masato OOTA, Masashi Sato, Daisuke SASAKI
  • Patent number: 10177855
    Abstract: An amplitude adjustment circuit includes a memory that stores correspondence information between frequency distributions of an amplitude and adjustment coefficients, a processor configured to generate a frequency distribution of amplitude of data for which adaptive equalization processing has been executed, acquire the correspondence information between frequency distributions of the amplitude and adjustment coefficients from the memory, select the adjustment coefficient based on a result of comparison between the frequency distributions included in the correspondence information acquired by the acquiring unit and the frequency distribution generated by the generating unit, and adjust a gain of the data based on the adjustment coefficient selected by the selecting unit.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: January 8, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Masashi Sato, Kazuhiko Hatae, Nobukazu Koizumi, Yasuo Ohtomo, Masato Oota, Daisuke Sasaki, Yuya Imoto
  • Publication number: 20180123701
    Abstract: An amplitude adjustment circuit includes a memory that stores correspondence information between frequency distributions of an amplitude and adjustment coefficients, a processor configured to generate a frequency distribution of amplitude of data for which adaptive equalization processing has been executed, acquire the correspondence information between frequency distributions of the amplitude and adjustment coefficients from the memory, select the adjustment coefficient based on a result of comparison between the frequency distributions included in the correspondence information acquired by the acquiring unit and the frequency distribution generated by the generating unit, and adjust a gain of the data based on the adjustment coefficient selected by the selecting unit.
    Type: Application
    Filed: October 6, 2017
    Publication date: May 3, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Masashi Sato, KAZUHIKO HATAE, Nobukazu KOIZUMI, Yasuo OHTOMO, Masato OOTA, Daisuke SASAKI, Yuya IMOTO