Patents by Inventor Yuya MAEDA

Yuya MAEDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9614099
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer including a first semiconductor portion and a second semiconductor portion being continuous with the first semiconductor portion, a first gate electrode, a second gate electrode, an insulating film. The first semiconductor portion includes a first portion, a second portion and a third portion provided between the first portion and the second portion. The second semiconductor portion includes a fourth portion separated from the first portion, a fifth portion separated from the second portion, and a sixth portion provided between the forth portion and the fifth portion. The first gate electrode is separated from the third portion. The second gate electrode is separated from the sixth portion. The insulating film is provided at a first position between the first gate electrode and the semiconductor layer and at a second position between the second gate electrode and the semiconductor layer.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: April 4, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shintaro Nakano, Tomomasa Ueda, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Yuya Maeda, Masaki Atsuta, Hajime Yamaguchi
  • Publication number: 20170033239
    Abstract: A semiconductor device includes a substrate having a major surface and a thin film transistor on the substrate. The thin film transistor includes an oxynitride semiconductor layer, first and second conductive layers, a first gate electrode and a first insulating layer. The oxynitride semiconductor layer includes a first portion electrically connected to the first conductive layer, a second portion electrically connected to the second conductive layer, and a third portion provided between the first and second portions. The oxynitride semiconductor layer includes indium, gallium, zinc, and nitrogen, a nitrogen content of the oxynitride semiconductor layer being 2 atomic % or less, and a gallium content of the oxynitride semiconductor layer is more than the nitrogen content. The first gate electrode is separated from the third portion in a direction intersecting the first direction; and the first insulating layer is provided between the third portion and the first gate electrode.
    Type: Application
    Filed: August 5, 2016
    Publication date: February 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Nobuyoshi SAITO, Kentaro MIURA, Yuya MAEDA
  • Publication number: 20160380115
    Abstract: A thin film transistor includes semiconductor layer, source electrode, and drain electrode. The semiconductor layer includes first to fifth regions. The third region is provided between the first and second regions. The first region is disposed between the fourth and third regions. The second region is disposed between the fifth and third regions. The semiconductor layer includes an oxide. The source electrode is connected to the first region. The drain electrode is connected to the second region. First thickness of the first region along a second direction is thinner than third thickness along the second direction of each of the third to fifth regions. The second direction crosses a first direction and connects the first region and the source electrode. The first direction connects the first and second regions. Second thickness of the second region along the second direction is thinner than the third thickness.
    Type: Application
    Filed: September 7, 2016
    Publication date: December 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Yuya MAEDA, Tatsuya OHGURO, Hisayo MOMOSE, Tetsu MOROOKA, Kazuya FUKASE, Nobuki KANREI
  • Publication number: 20160372604
    Abstract: According to one embodiment, a semiconductor device includes an oxide semiconductor transistor. The oxide semiconductor transistor includes a semiconductor layer including an oxide semiconductor, the semiconductor layer including a source region and a source electrode. The source electrode includes a source conductive layer including copper, a first tantalum-containing region provided between the source conductive layer and the source region, the first tantalum-containing region including tantalum, a first low nitrogen composition region provided between the first tantalum-containing region and the source region, the first low nitrogen composition region including Ta1?x1Nx1 (0<x1<0.5), and a first high nitrogen composition region provided between the first low nitrogen composition region and the source region, the first high nitrogen composition region including Ta1?x2Nx2 (0.5?x2<1).
    Type: Application
    Filed: August 30, 2016
    Publication date: December 22, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuya MAEDA, Shintaro NAKANO, Nobuyoshi SAITO, Hajime YAMAGUCHI
  • Publication number: 20160240561
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer. The third semiconductor is provided between the first semiconductor layer and the second semiconductor layer. A first transistor includes a first gate electrode and a first amorphous semiconductor layer. The first gate electrode and the first amorphous semiconductor layer overlap in a first direction. The first direction is from the first semiconductor layer toward the second semiconductor layer. The first gate electrode is provided between the second semiconductor layer and the first amorphous semiconductor layer.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 18, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Nobuyoshi SAITO, Tomio ONO, Shigeya KIMURA, Jumpei TAJIMA, Kentaro MIURA, Shintaro NAKANO, Yuya MAEDA
  • Publication number: 20160093742
    Abstract: A semiconductor device according to an embodiment, includes a gate electrode, a first dielectric film, a first oxide semiconductor film, a second dielectric film, a source electrode, a source wire, a drain electrode, and a drain wire. The source wire is arranged on the second dielectric film, and connected to the source electrode. The drain wire is arranged on the second dielectric film, and connected to the drain electrode. At least one of the source wire and the drain wire includes a fringe portion sticking out above a channel region. A barrier film that suppresses intrusion of hydrogen is arranged being in contact with at least one of an upper surface and a lower surface of the fringe portion. A region where the barrier film is not formed is included above the channel region.
    Type: Application
    Filed: March 19, 2015
    Publication date: March 31, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisayo MOMOSE, Tatsuya OHGURO, Tetsu MOROOKA, Kazuya FUKASE, Shintaro NAKANO, Yuya MAEDA, Shuichi TORIYAMA, Nobuki KANREI
  • Patent number: 9293600
    Abstract: A semiconductor element includes a semiconductor layer, a first and a second conductive unit, a gate electrode, and a gate insulating film. The semiconductor layer includes a first portion, a second portion, and a third portion provided between the first portion and the second portion. The first conductive unit is electrically connected to the first portion. The second conductive unit is electrically connected to the second portion. The gate electrode is separated from the first conductive unit, the second conductive unit, and the third portion. The gate electrode opposes the third portion. The gate insulating film is provided between the third portion and the gate electrode. A concentration of nitrogen of the first portion is higher than a concentration of nitrogen of the third portion. A concentration of nitrogen of the second portion is higher than the concentration of nitrogen of the third portion.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: March 22, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shintaro Nakano, Tomomasa Ueda, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Yuya Maeda, Masaki Atsuta, Hajime Yamaguchi
  • Patent number: 9224871
    Abstract: According to one embodiment, a thin film transistor includes a first insulating film, a gate electrode, a semiconductor layer, a gate insulator film, a second insulating film, a source electrode, a tunneling insulating portion, and a drain electrode. The semiconductor layer is provided between the gate electrode and the first insulating film, and includes an amorphous oxide. The gate insulator film is provided between the semiconductor layer and the gate electrode. The second insulating film is provided between the semiconductor layer and the first insulating film. The tunneling insulating portion is provided between the semiconductor layer and the source electrode, and between the semiconductor layer and the drain electrode, and between the first insulating film and the second insulating film. The tunneling insulating portion includes oxygen and at least one selected from aluminum and magnesium. A thickness of the tunneling insulating portion is 2 nanometers or less.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: December 29, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuya Maeda, Hajime Yamaguchi, Tomomasa Ueda, Kentaro Miura, Shintaro Nakano, Nobuyoshi Saito, Tatsunori Sakano
  • Patent number: 9159747
    Abstract: According to one embodiment, a display device includes a substrate unit, a thin film transistor, a pixel electrode and a display layer. The substrate unit includes a substrate, a first insulating layer provided on the substrate, and a second insulating layer provided on the first insulating layer. The thin film transistor is provided on the substrate unit and includes a gate electrode provided on the second insulating layer, a semiconductor layer of an oxide separated from the gate electrode, a gate insulation layer provided between the gate electrode and the semiconductor layer, a first conductive portion, a second conductive portion, and a third insulating layer. The pixel electrode is connected to one selected from the first and second conductive portions. The display layer is configured to have a light emission or a change of optical characteristic occurring according to a charge supplied to the pixel electrode.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: October 13, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shintaro Nakano, Tomomasa Ueda, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Yuya Maeda, Hajime Yamaguchi
  • Patent number: 9006828
    Abstract: A display device includes a first electrode, a second electrode, an organic light emitting layer, a first transistor, and a second transistor. The first transistor includes a first semiconductor layer, a first conductive unit, a second conductive unit, a first gate electrode, and a first gate insulating film. The second transistor includes a second semiconductor layer, a third conductive unit, a fourth conductive unit, a second gate electrode, and a second gate insulating film. An amount of hydrogen included in the first gate insulating film is larger than an amount of hydrogen included in the second gate insulating film.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: April 14, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuyoshi Saito, Tomomasa Ueda, Yuya Maeda, Kentaro Miura, Shintaro Nakano, Tatsunori Sakano, Hajime Yamaguchi
  • Publication number: 20150084042
    Abstract: According to one embodiment, a thin film transistor includes a first insulating film, a gate electrode, a semiconductor layer, a gate insulator film, a second insulating film, a source electrode, a tunneling insulating portion, and a drain electrode. The semiconductor layer is provided between the gate electrode and the first insulating film, and includes an amorphous oxide. The gate insulator film is provided between the semiconductor layer and the gate electrode. The second insulating film is provided between the semiconductor layer and the first insulating film. The tunneling insulating portion is provided between the semiconductor layer and the source electrode, and between the semiconductor layer and the drain electrode, and between the first insulating film and the second insulating film. The tunneling insulating portion includes oxygen and at least one selected from aluminum and magnesium. A thickness of the tunneling insulating portion is 2 nanometers or less.
    Type: Application
    Filed: August 22, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuya MAEDA, Hajime YAMAGUCHI, Tomomasa UEDA, Kentaro MIURA, Shintaro NAKANO, Nobuyoshi SAITO, Tatsunori SAKANO
  • Publication number: 20150084040
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer including a first semiconductor portion and a second semiconductor portion being continuous with the first semiconductor portion, a first gate electrode, a second gate electrode, an insulating film. The first semiconductor portion includes a first portion, a second portion and a third portion provided between the first portion and the second portion. The second semiconductor portion includes a fourth portion separated from the first portion, a fifth portion separated from the second portion, and a sixth portion provided between the forth portion and the fifth portion. The first gate electrode is separated from the third portion. The second gate electrode is separated from the sixth portion. The insulating film is provided at a first position between the first gate electrode and the semiconductor layer and at a second position between the second gate electrode and the semiconductor layer.
    Type: Application
    Filed: August 8, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Tomomasa UEDA, Kentaro MIURA, Nobuyoshi SAITO, Tatsunori SAKANO, Yuya MAEDA, Masaki ATSUTA, Hajime YAMAGUCHI
  • Publication number: 20150087093
    Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. The method can include forming a first resin layer on a substrate. The method can include forming a display layer on the first resin layer. The display layer includes a plurality of pixels arranged in a direction perpendicular to a stacking direction of the first resin layer and the display layer. Each of the pixels includes a first electrode provided on the first resin layer, an organic light emitting layer provided on the first electrode, and a second electrode provided on the organic light emitting layer. The method can include bonding a second resin layer onto the display layer via a bonding layer. The method can include removing the substrate. The method can include increasing a density of the bonding layer.
    Type: Application
    Filed: August 13, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori SAKANO, Kentaro Miura, Tomomasa Ueda, Nobuyoshi Saito, Shintaro Nakano, Yuya Maeda, Hajime Yamaguchi
  • Publication number: 20150084021
    Abstract: A semiconductor element includes a semiconductor layer, a first and a second conductive unit, a gate electrode, and a gate insulating film. The semiconductor layer includes a first portion, a second portion, and a third portion provided between the first portion and the second portion. The first conductive unit is electrically connected to the first portion. The second conductive unit is electrically connected to the second portion. The gate electrode is separated from the first conductive unit, the second conductive unit, and the third portion. The gate electrode opposes the third portion. The gate insulating film is provided between the third portion and the gate electrode. A concentration of nitrogen of the first portion is higher than a concentration of nitrogen of the third portion. A concentration of nitrogen of the second portion is higher than the concentration of nitrogen of the third portion.
    Type: Application
    Filed: August 18, 2014
    Publication date: March 26, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Tomomasa UEDA, Kentaro MIURA, Nobuyoshi SAITO, Tatsunori SAKANO, Yuya MAEDA, Masaki ATSUTA, Hajime YAMAGUCHI
  • Publication number: 20150076471
    Abstract: A display device includes a first electrode, a second electrode, an organic light emitting layer, a first transistor, and a second transistor. The first transistor includes a first semiconductor layer, a first conductive unit, a second conductive unit, a first gate electrode, and a first gate insulating film. The second transistor includes a second semiconductor layer, a third conductive unit, a fourth conductive unit, a second gate electrode, and a second gate insulating film. An amount of hydrogen included in the first gate insulating film is larger than an amount of hydrogen included in the second gate insulating film.
    Type: Application
    Filed: August 7, 2014
    Publication date: March 19, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Nobuyoshi SAITO, Tomomasa Ueda, Yuya Maeda, Kentaro Miura, Shintaro Nakano, Tatsunori Sakano, Hajime Yamaguchi
  • Publication number: 20140284594
    Abstract: According to one embodiment, a display device includes a substrate unit, a thin film transistor, a pixel electrode and a display layer. The substrate unit includes a substrate, a first insulating layer provided on the substrate, and a second insulating layer provided on the first insulating layer. The thin film transistor is provided on the substrate unit and includes a gate electrode provided on the second insulating layer, a semiconductor layer of an oxide separated from the gate electrode, a gate insulation layer provided between the gate electrode and the semiconductor layer, a first conductive portion, a second conductive portion, and a third insulating layer. The pixel electrode is connected to one selected from the first and second conductive portions. The display layer is configured to have a light emission or a change of optical characteristic occurring according to a charge supplied to the pixel electrode.
    Type: Application
    Filed: February 7, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Tomomasa Ueda, Kentaro Miura, Nobuyoshi Saito, Tatsunori Sakano, Yuya Maeda, Hajime Yamaguchi
  • Publication number: 20140285914
    Abstract: According to one embodiment, a method for manufacturing a display device is disclosed. The method can include bonding a display body to a filter body, irradiating light and separating. The display body includes a first support unit and a display unit. The first support unit includes a first substrate, a first metal layer, and a first resin layer. The display unit has a first region and a second region. The filter body includes a second support unit and a filter unit. The second support unit includes a second substrate, a second metal layer and a second resin layer. In the bonding, the display unit and the filter unit are disposed between the first and second substrates. The light is irradiated onto the first and second metal layers. The first substrate is separated from the first resin layer and the second substrate is separated from the second resin layer.
    Type: Application
    Filed: February 3, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori SAKANO, Kentaro Miura, Tomomasa Ueda, Nobuyoshi Saito, Shintaro Nakano, Yuya Maeda, Hajime Yamaguchi
  • Publication number: 20140246685
    Abstract: According to one embodiment, a method for manufacturing a display element is disclosed. The method can include forming a peeling layer, forming a resin layer, forming a barrier layer, forming an interconnect layer, forming a display layer, and removing. The peeling layer is formed on a major surface of a base body. The major surface has first, second, and third regions. The peeling layer includes first, second, and third peeling portions. The resin layer is formed on the peeling layer. The resin layer includes first and second resin portions. The barrier layer is formed on the first, second, and third peeling portions. The interconnect layer is formed on the barrier layer. The display layer is formed on the interconnect layer. The first peeling portion is removed from the first resin portion and the second peeling portion is removed from the second resin portion.
    Type: Application
    Filed: February 4, 2014
    Publication date: September 4, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kentaro MIURA, Tatsunori SAKANO, Tomomasa UEDA, Nobuyoshi SAITO, Shintaro NAKANO, Yuya MAEDA, Hajime YAMAGUCHI