Patents by Inventor Yuya Muramatsu

Yuya Muramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11842968
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 12, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Yabuta, Takayuki Yamada, Yuya Muramatsu, Noriyuki Besshi, Yutaro Sugi, Hiroaki Haruna, Masaru Fuku, Atsuki Fujita
  • Publication number: 20220254738
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Application
    Filed: April 29, 2022
    Publication date: August 11, 2022
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei YABUTA, Takayuki YAMADA, Yuya MURAMATSU, Noriyuki BESSHI, Yutaro SUGI, Hiroaki HARUNA, Masaru FUKU, Atsuki FUJITA
  • Publication number: 20220208636
    Abstract: A reliable semiconductor module and a reliable power conversion device using the semiconductor module are obtained. A semiconductor module includes a heat dissipation member, a semiconductor device, and a thermally conductive insulating resin sheet. The thermally conductive insulating resin sheet connects the heat dissipation member and the semiconductor device. The semiconductor device includes a semiconductor element and a metal wiring member. The metal wiring member is electrically connected to the semiconductor element. The metal wiring member includes a terminal portion protruding outside the semiconductor device. In a surface portion of the semiconductor device, a concave portion is formed outward of a partial region to which the thermally conductive insulating resin sheet is connected. The concave portion is located in a region closer to the heat dissipation member than the terminal portion.
    Type: Application
    Filed: June 6, 2019
    Publication date: June 30, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomohisa YAMANE, Hisayuki TAKI, Noriyuki BESSHI, Yuya MURAMATSU, Masaru FUKU
  • Patent number: 11342281
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: May 24, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei Yabuta, Takayuki Yamada, Yuya Muramatsu, Noriyuki Besshi, Yutaro Sugi, Hiroaki Haruna, Masaru Fuku, Atsuki Fujita
  • Patent number: 10937725
    Abstract: A semiconductor device comprises: a ceramic substrate having conductor layers on both surfaces thereof; a semiconductor element joined to the upper surface conductor layer of the ceramic substrate; a frame member arranged on the upper surface conductor layer so as to surround a side surface of the semiconductor element; and an electrode, which is joined to an upper portion of the semiconductor element via a second fixing layer, and has fitting portions on a side surface of the electrode. On an inner wall of the frame member, fitting portions to be fitted to the fitting portions of the electrode and four positioning portions extending from the inner wall of the frame member to the side surfaces of the electrode are formed.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: March 2, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yuya Muramatsu, Noriyuki Besshi, Ryuichi Ishii
  • Publication number: 20200251423
    Abstract: A power semiconductor device includes a substrate and a semiconductor element bonded onto a first surface of the substrate through use of a sintered metal bonding material. The substrate has a plurality of dimples formed in the first surface and located outside a location immediately below a heat generation unit of the semiconductor element. The sintered metal bonding material is supplied onto the substrate after the formation of the dimples, and the semiconductor element is bonded to the substrate through application of heat and a pressure thereto.
    Type: Application
    Filed: October 25, 2018
    Publication date: August 6, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kohei YABUTA, Takayuki YAMADA, Yuya MURAMATSU, Noriyuki BESSHI, Yutaro SUGI, Hiroaki HARUNA, Masaru FUKU, Atsuki FUJITA
  • Patent number: 10727167
    Abstract: This power semiconductor device is provided with: a substrate; and a semiconductor element which is bonded onto the substrate using a sinterable metal bonding material. The semiconductor element comprises: a base; a first conductive layer that is provided on a first surface of the base, said first surface being on the substrate side; and a second conductive layer that is provided on a second surface of the base, said second surface being on the reverse side of the first surface. The thickness of the first conductive layer is from 0.5 times to 2.0 times (inclusive) the thickness of the second conductive layer.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: July 28, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Yamada, Noriyuki Besshi, Yuya Muramatsu, Masaru Fuku, Dai Nakajima
  • Publication number: 20200105655
    Abstract: A semiconductor device comprises: a ceramic substrate having conductor layers on both surfaces thereof; a semiconductor element joined to the upper surface conductor layer of the ceramic substrate; a frame member arranged on the upper surface conductor layer so as to surround a side surface of the semiconductor element; and an electrode, which is joined to an upper portion of the semiconductor element via a second fixing layer, and has fitting portions on a side surface of the electrode. On an inner wall of the frame member, fitting portions to be fitted to the fitting portions of the electrode and four positioning portions extending from the inner wall of the frame member to the side surfaces of the electrode are formed.
    Type: Application
    Filed: December 26, 2017
    Publication date: April 2, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuya MURAMATSU, Noriyuki BESSHI, Ryuichi ISHII
  • Publication number: 20190006265
    Abstract: This power semiconductor device is provided with: a substrate; and a semiconductor element which is bonded onto the substrate using a sinterable metal bonding material. The semiconductor element comprises: a base; a first conductive layer that is provided on a first surface of the base, said first surface being on the substrate side; and a second conductive layer that is provided on a second surface of the base, said second surface being on the reverse side of the first surface. The thickness of the first conductive layer is from 0.5 times to 2.0 times (inclusive) the thickness of the second conductive layer.
    Type: Application
    Filed: January 6, 2017
    Publication date: January 3, 2019
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takayuki Yamada, Noriyuki Besshi, Yuya Muramatsu, Masaru Fuku, Dai Nakajima