Patents by Inventor Yuzaburo Ban
Yuzaburo Ban has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7426227Abstract: A semiconductor laser device includes: a first cladding layer, which is made of a nitride semiconductor of a first conductivity type and is formed over a substrate; an active layer, which is made of another nitride semiconductor and is formed over the first cladding layer; and a second cladding layer, which is made of still another nitride semiconductor of a second conductivity type and is formed over the active layer. A spontaneous-emission-absorbing layer, which is made of yet another nitride semiconductor of the first conductivity type and has such an energy gap as absorbing spontaneous emission that has been radiated from the active layer, is formed between the substrate and the first cladding layer.Type: GrantFiled: June 7, 2006Date of Patent: September 16, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Kume, Isao Kidoguchi, Yuzaburo Ban, Ryoko Miyanaga, Masakatsu Suzuki
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Patent number: 7212556Abstract: A semiconductor laser device includes: a first cladding layer, which is made of a nitride semiconductor of a first conductivity type and is formed over a substrate; an active layer, which is made of another nitride semiconductor and is formed over the first cladding layer; and a second cladding layer, which is made of still another nitride semiconductor of a second conductivity type and is formed over the active layer. A spontaneous-emission-absorbing layer, which is made of yet another nitride semiconductor of the first conductivity type and has such an energy gap as absorbing spontaneous emission that has been radiated from the active layer, is formed between the substrate and the first cladding layer.Type: GrantFiled: February 15, 2000Date of Patent: May 1, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Kume, Isao Kidoguchi, Yuzaburo Ban, Ryoko Miyanaga, Masakatsu Suzuki
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Patent number: 7160748Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: GrantFiled: February 24, 2005Date of Patent: January 9, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Publication number: 20060239311Abstract: A semiconductor laser device includes: a first cladding layer, which is made of a nitride semiconductor of a first conductivity type and is formed over a substrate; an active layer, which is made of another nitride semiconductor and is formed over the first cladding layer; and a second cladding layer, which is made of still another nitride semiconductor of a second conductivity type and is formed over the active layer. A spontaneous-emission-absorbing layer, which is made of yet another nitride semiconductor of the first conductivity type and has such an energy gap as absorbing spontaneous emission that has been radiated from the active layer, is formed between the substrate and the first cladding layer.Type: ApplicationFiled: June 7, 2006Publication date: October 26, 2006Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Kume, Isao Kidoguchi, Yuzaburo Ban, Ryoko Miyanaga, Masakatsu Suzuki
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Patent number: 7108745Abstract: After a Group III-V compound semiconductor layer, to which a p-type dopant has been introduced, has been formed over a substrate, the compound semiconductor layer is annealed. In the stage of heating the compound semiconductor layer, atoms, deactivating the p-type dopant, are eliminated from the compound semiconductor layer by creating a temperature gradient in the compound semiconductor layer.Type: GrantFiled: April 16, 2003Date of Patent: September 19, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiaki Hasegawa, Ayumu Tsujimura, Isao Kidoguchi, Yuzaburo Ban
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Patent number: 7092423Abstract: A semiconductor laser device includes: a first cladding layer, which is made of a nitride semiconductor of a first conductivity type and is formed over a substrate; an active layer, which is made of another nitride semiconductor and is formed over the first cladding layer; and a second cladding layer, which is made of still another nitride semiconductor of a second conductivity type and is formed over the active layer. A spontaneous-emission-absorbing layer, which is made of yet another nitride semiconductor of the first conductivity type and has such an energy gap as absorbing spontaneous emission that has been radiated from the active layer, is formed between the substrate and the first cladding layer.Type: GrantFiled: May 25, 2004Date of Patent: August 15, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Kume, Isao Kidoguchi, Yuzaburo Ban, Ryoko Miyanaga, Masakatsu Suzuki
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Patent number: 6940100Abstract: A semiconductor light-emitting device of Group III-V compound semiconductors includes a quantum well layer, which is formed over a substrate and includes a barrier layer and a well layer that are alternately stacked one upon the other. The band gap of the well layer is narrower than that of the barrier layer. The well layer contains indium and nitrogen, while the barrier layer contains aluminum and nitrogen. In this structure, a tensile strain is induced in the barrier layer, and therefore, a compressive strain induced in the quantum well layer can be reduced. As a result, a critical thickness, at which pits are created, can be increased.Type: GrantFiled: January 3, 2003Date of Patent: September 6, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Ayumu Tsujimura, Yoshiaki Hasegawa, Akihiko Ishibashi, Isao Kidoguchi, Yuzaburo Ban, Masakatsu Suzuki
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Patent number: 6921678Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: GrantFiled: May 9, 2003Date of Patent: July 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Publication number: 20050142682Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: ApplicationFiled: February 24, 2005Publication date: June 30, 2005Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Patent number: 6911351Abstract: The method of fabricating a nitride semiconductor of this invention includes the steps of forming, on a substrate, a first nitride semiconductor layer of AluGavInwN, wherein 0?u, v, w?1 and u+v+w=1; forming, in an upper portion of the first nitride semiconductor layer, plural convexes extending at intervals along a substrate surface direction; forming a mask film for covering bottoms of recesses formed between the convexes adjacent to each other; and growing, on the first nitride semiconductor layer, a second nitride semiconductor layer of AlxGayInzN, wherein 0?x, y, z?1 and x+y+z=1, by using, as a seed crystal, C planes corresponding to top faces of the convexes exposed from the mask film.Type: GrantFiled: January 16, 2003Date of Patent: June 28, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Isao Kidoguchi, Akihiko Ishibashi, Ryoko Miyanaga, Gaku Sugahara, Masakatsu Suzuki, Masahiro Kume, Yuzaburo Ban, Kiyoyuki Morita, Ayumu Tsujimura, Yoshiaki Hasegawa
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Patent number: 6867112Abstract: The method of fabricating a nitride semiconductor device of this invention includes plural steps of respectively growing plural nitride semiconductor layers on a substrate; and between a step of growing one nitride semiconductor layer and a step of growing another nitride semiconductor layer adjacent to the one nitride semiconductor layer among the plural steps, a step of changing a growth ambient pressure from a first growth ambient pressure to a second growth ambient pressure different from the first growth ambient pressure.Type: GrantFiled: October 20, 2000Date of Patent: March 15, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Isao Kidoguchi, Kenji Harafuji, Yuzaburo Ban
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Publication number: 20040213315Abstract: A semiconductor laser device includes: a first cladding layer, which is made of a nitride semiconductor of a first conductivity type and is formed over a substrate; an active layer, which is made of another nitride semiconductor and is formed over the first cladding layer; and a second cladding layer, which is made of still another nitride semiconductor of a second conductivity type and is formed over the active layer. A spontaneous-emission-absorbing layer, which is made of yet another nitride semiconductor of the first conductivity type and has such an energy gap as absorbing spontaneous emission that has been radiated from the active layer, is formed between the substrate and the first cladding layer.Type: ApplicationFiled: May 25, 2004Publication date: October 28, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Masahiro Kume, Isao Kidoguchi, Yuzaburo Ban, Ryoko Miyanaga, Masakatsu Suzuki
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Patent number: 6734530Abstract: A GaN-based compound semiconductor epi-wafer includes: a substrate 11 made of a first nitride semiconductor belonging to a hexagonal system; and an element layer 12 for forming a semiconductor element, which is made of a second nitride semiconductor belonging to the hexagonal system and which is grown on a principal surface of the substrate 11. An orientation of the principal surface of the substrate 11 has an off-angle in a predetermined direction with respect to a (0001) plane, and the element layer 12 has a surface morphology of a stripe pattern extending substantially in parallel to the predetermined direction.Type: GrantFiled: June 5, 2002Date of Patent: May 11, 2004Assignee: Matsushita Electric Industries Co., Ltd.Inventor: Yuzaburo Ban
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Patent number: 6720586Abstract: The method of fabricating a nitride semiconductor of this invention includes the steps of forming, on a substrate, a first nitride semiconductor layer of AluGavInwN, wherein 0≦u, v, w ≦1 and u+v+w=1; forming, in an upper portion of the first nitride semiconductor layer, plural convexes extending at intervals along a substrate surface direction; forming a mask film for covering bottoms of recesses formed between the convexes adjacent to each other; and growing, on the first nitride semiconductor layer, a second nitride semiconductor layer of AlxGayInzN, wherein 0≦x, y, z≦1 and x+y+z=1, by using, as a seed crystal, Cplanes corresponding to top faces of the convexes exposed from the mask film.Type: GrantFiled: November 15, 2000Date of Patent: April 13, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Isao Kidoguchi, Akihiko Ishibashi, Ryoko Miyanaga, Gaku Sugahara, Masakatsu Suzuki, Masahiro Kume, Yuzaburo Ban, Kiyoyuki Morita, Ayumu Tsujimura, Yoshiaki Hasegawa
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Patent number: 6667185Abstract: The method of fabricating a nitride semiconductor device of this invention includes plural steps of respectively growing plural nitride semiconductor layers on a substrate; and between a step of growing one nitride semiconductor layer and a step of growing another nitride semiconductor layer adjacent to the one nitride semiconductor layer among the plural steps, a step of changing a growth ambient pressure from a first growth ambient pressure to a second growth ambient pressure different from the first growth ambient pressure.Type: GrantFiled: January 31, 2003Date of Patent: December 23, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Isao Kidoguchi, Kenji Harafuji, Yuzaburo Ban
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Publication number: 20030209192Abstract: After a Group III-V compound semiconductor layer, to which a p-type dopant has been introduced, has been formed over a substrate, the compound semiconductor layer is annealed. In the stage of heating the compound semiconductor layer, atoms, deactivating the p-type dopant, are eliminated from the compound semiconductor layer by creating a temperature gradient in the compound semiconductor layer.Type: ApplicationFiled: April 16, 2003Publication date: November 13, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshiaki Hasegawa, Ayumu Tsujimura, Isao Kidoguchi, Yuzaburo Ban
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Publication number: 20030203629Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a-first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.Type: ApplicationFiled: May 9, 2003Publication date: October 30, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
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Publication number: 20030168653Abstract: A semiconductor light-emitting device of Group III-V compound semiconductors includes a quantum well layer, which is formed over a substrate and includes a barrier layer and a well layer that are alternately stacked one upon the other. The band gap of the well layer is narrower than that of the barrier layer. The well layer contains indium and nitrogen, while the barrier layer contains aluminum and nitrogen. In this structure, a tensile strain is induced in the barrier layer, and therefore, a compressive strain induced in the quantum well layer can be reduced. As a result, a critical thickness, at which pits are created, can be increased.Type: ApplicationFiled: January 3, 2003Publication date: September 11, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Ayumu Tsujimura, Yoshiaki Hasegawa, Akihiko Ishibashi, Isao Kidoguchi, Yuzaburo Ban, Masakatsu Suzuki
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Patent number: 6614059Abstract: A semiconductor light-emitting device of Group III-V compound semiconductors includes a quantum well layer, which is formed over a substrate and includes a barrier layer and a well layer that are alternately stacked one upon the other. The band gap of the well layer is narrower than that of the barrier layer. The well layer contains indium and nitrogen, while the barrier layer contains aluminum and nitrogen. In this structure, a tensile strain is induced in the barrier layer, and therefore, a compressive strain induced in the quantum well layer can be reduced. As a result, a critical thickness, at which pits are created, can be increased.Type: GrantFiled: January 7, 2000Date of Patent: September 2, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Ayumu Tsujimura, Yoshiaki Hasegawa, Akihiko Ishibashi, Isao Kidoguchi, Yuzaburo Ban, Masakatsu Suzuki
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Patent number: 6611005Abstract: The method for producing a semiconductor of the present invention grows a compound semiconductor on a substrate held by a susceptor provided, in a reaction chamber in accordance with a metalorganic vapor phase epitaxy technique. The method includes the steps of: supplying a Group III source gas containing indium and a Group V source gas containing nitrogen into the reaction chamber; and mixing the Group III and Group V source gases, supplied into the reaction chamber, with each other, and supplying a rare gas as a carrier gas into the reaction chamber so as to carry the mixed source gas onto the upper surface of the substrate.Type: GrantFiled: March 2, 2001Date of Patent: August 26, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Ayumu Tsujimura, Yoshiaki Hasegawa, Akihiko Ishibashi, Isao Kidoguchi, Yuzaburo Ban