Patents by Inventor Yuzaburo Iwasa

Yuzaburo Iwasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4688193
    Abstract: A relay ladder sequence circuitry having i columns and j rows is divided into a plurality of sections each having a predetermined number of rows, and the bit informations are processed in a parallel manner in the rows of the sections. More specifically, the program in accordance with the sequence ladder construction is memorized and are successively read out as the addresses of the program are appointed. The signals of relay contacts as the bit information are processed for each line in accordance with the read out program, so that a high processing speed is attained.
    Type: Grant
    Filed: July 27, 1984
    Date of Patent: August 18, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Hiromasa Yamaoka, Tadashi Okamoto, Yuzaburo Iwasa, Kouichi Kimura
  • Patent number: 4494113
    Abstract: Method and apparatus for controlling collision in a system having a common unit shared by a plurality of devices are disclosed. More particularly, method and apparatus for controlling priority collision in a system where a computer is shared by a plurality of terminal devices or a memory unit is shared by a plurality of computers are disclosed. Continued time period of non-access to the common unit by any of the plurality of devices is measured in each of the plurality of devices, and when the measured time period coincides with one of preset time periods inherently assigned to the respective devices, the associated one of the plurality of devices is permitted to access to the common unit on the condition that the common unit is not busy and that one device issues an access request to the common unit. In addition to ordinary access request to the common unit, a priority interruption access request may be issued.
    Type: Grant
    Filed: March 10, 1982
    Date of Patent: January 15, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Hiromasa Yamaoka, Yuzaburo Iwasa, Kazuhisa Matunaga
  • Patent number: 4150734
    Abstract: An elevator car control apparatus is disclosed in which a three-phase AC tachometer generator is coupled to a motor for driving an elevator car, and the AC output of the tachometer generator is full-wave rectified for use as a speed feedback voltage. A waveform-shaping circuit generates one pulse for each cycle of the output of the AC tachometer generator. A counter counts such pulses after the car has passed a deceleration-initiating point, thereby producing the number of counts proportional to a car running distance after the passage of the deceleration-initiating point. From this number of counts, a deceleration command voltage decreasing progressively in accordance with car positions is obtained by a decoder and a digital-analog converter. During deceleration, the car-drive motor is subjected to feedback control in accordance with the difference between the speed feedback voltage and the deceleration command voltage, thus effecting deceleration control of the elevator car.
    Type: Grant
    Filed: January 24, 1978
    Date of Patent: April 24, 1979
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Ohira, Tadao Kameyama, Chihiko Honzyo, Yuzaburo Iwasa, Takanobu Hatakeyama