Patents by Inventor Yuzhu Li

Yuzhu Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11840517
    Abstract: Provided herein are a lappaconitine derivative of formula (I), and a preparation and application thereof.
    Type: Grant
    Filed: January 22, 2022
    Date of Patent: December 12, 2023
    Assignee: Southwest Jiaotong University
    Inventors: Xianli Zhou, Feng Gao, Xiaohuan Li, Yuzhu Li, Shuai Huang, Lin Chen, Yinyong Zhang
  • Patent number: 11732056
    Abstract: A pollen polysaccharide extract prepared by the following method: mixing rape pollen with water, then heating and stirring for extraction, filtering, mixing filtrates, adding chitosan to a resulting filtrate to obtain a liquid to be clarified, keeping the liquid to be clarified at 60-80° C. for at least 1 h, cooling and allowing to stand, and performing solid-liquid separation to obtain a liquid, namely the pollen polysaccharide extract.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: August 22, 2023
    Assignee: CHENGDU NEWSUN CROP SCIENCE CO., LTD.
    Inventors: Qiming He, Shaojun Zhan, Jin Huang, Yuzhu Li, Chuting Du, Ke Liu, Huihui Wang, Huilin Li, Yanling Wang, Dan Wu, Dan Huang, Liangzhu Kang, Linfeng Hang, Hao Yin
  • Publication number: 20230064585
    Abstract: A pollen polysaccharide extract prepared by the following method: mixing rape pollen with water, then heating and stirring for extraction, filtering, mixing filtrates, adding chitosan to a resulting filtrate to obtain a liquid to be clarified, keeping the liquid to be clarified at 60-80° C. for at least 1 h, cooling and allowing to stand, and performing solid-liquid separation to obtain a liquid, namely the pollen polysaccharide extract.
    Type: Application
    Filed: December 25, 2020
    Publication date: March 2, 2023
    Applicant: CHENGDU NEWSUN CROP SCIENCE CO., LTD.
    Inventors: Qiming HE, Shaojun ZHAN, Jin HUANG, Yuzhu LI, Chuting DU, Ke LIU, Huihui WANG, Huilin LI, Yanling WANG, Dan WU, Dan HUANG, Liangzhu KANG, Linfeng HANG, Hao YIN
  • Publication number: 20220144779
    Abstract: Provided herein are a lappaconitine derivative of formula (I), and a preparation and application thereof.
    Type: Application
    Filed: January 22, 2022
    Publication date: May 12, 2022
    Inventors: Xianli ZHOU, Feng GAO, Xiaohuan LI, Yuzhu LI, Shuai HUANG, Lin CHEN, Yinyong ZHANG
  • Patent number: 11200136
    Abstract: Embodiments of the present specification disclose data monitoring methods, apparatuses, electronic devices, and computer readable storage media. In an embodiment, a method comprising: receiving, from a network device, data at a frequency range higher than a predetermined frequency; determining whether the data belongs to a currently monitored data interval; in response to determining that the data does not belong to the currently monitored data interval, determining whether the data belongs to an abnormal data interval of a plurality of abnormal data intervals; in response to determining that the data belongs to the abnormal data interval, updating the abnormal data interval based on the data; and updating the currently monitored data interval to be the abnormal data interval in response to determining that the abnormal data interval satisfies a predetermined condition.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: December 14, 2021
    Assignee: Advanced New Technologies Co., Ltd.
    Inventor: Yuzhu Li
  • Publication number: 20210049087
    Abstract: Embodiments of the present specification disclose data monitoring methods, apparatuses, electronic devices, and computer readable storage media. In an embodiment, a method comprising: receiving, from a network device, data at a frequency range higher than a predetermined frequency; determining whether the data belongs to a currently monitored data interval; in response to determining that the data does not belong to the currently monitored data interval, determining whether the data belongs to an abnormal data interval of a plurality of abnormal data intervals; in response to determining that the data belongs to the abnormal data interval, updating the abnormal data interval based on the data; and updating the currently monitored data interval to be the abnormal data interval in response to determining that the abnormal data interval satisfies a predetermined condition.
    Type: Application
    Filed: October 30, 2020
    Publication date: February 18, 2021
    Applicant: Advanced New Technologies Co., Ltd.
    Inventor: Yuzhu Li
  • Patent number: 9634131
    Abstract: A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer and N? drift layer. There are active cells and dummy cells on top of the device. The active cell and dummy cell are separated by gate trench. The gate trench is formed by polysilicon and gate oxide layer. There are N+ region and P+ region in active cells, and they are connected to metal emitter layer through the window in the insulation layer. There are P-well regions in both active cells and dummy cells. The P-well regions in active cells are continuous and connected to emitter electrode through P+ region. The P-well regions in dummy cells are discontinuous and electrically floating.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: April 25, 2017
    Assignee: CHANGZHOU ZHONGMIN SEMI-TECH CO. LTD.
    Inventor: Yuzhu Li
  • Patent number: 9583605
    Abstract: A method to make a semiconductor device, a first SiO2 layer and a first Si3N4 layer are sequentially formed on the semiconductor substrate. The first SiO2 layer and the first Si3N4 layer are then patterned as etching mask to form a trench in a semiconductor substrate by a trench etching process. After this, a second SiO2 layer and a second Si3N4 layer are formed conformal onto the substrate. Anisotropic etching is then performed to remove the second Si3N4 and second SiO2 layer except on the trench sidewall. Then a thermal oxidation process is done to grow oxide only in trench bottom and at trench top corner. The radius of curvature of trench bottom and trench top corner is increased at the same time by this thermal oxidation process.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: February 28, 2017
    Assignee: Changzhou ZhongMin Semi-Tech Co. Ltd
    Inventor: Yuzhu Li
  • Patent number: 9478649
    Abstract: A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer, N-drift layer and N-type CS layer within the N-drift layer near the top side. Multiple trench structures are formed by polysilicon core and gate oxide layer near the front side. There are active cells and plugged cells on top of the device. The polysilicon cores of the trenches in the active cells are connected to the gate electrode, and the polysilicon cores of the trenches in the plugged cells are connected to the emitter electrode. There are N+ region and P+ region in active cells, and they are connected to metal emitter layer through the window in the insulation layer. There are P-well regions in both active cells and plugged cells. The P-well regions in active cells are continuous and connected to emitter electrode through P+ region. The P-well regions in plugged cells are divided by N-drift layer, forming discontinuous P-type regions along the direction of trenches.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: October 25, 2016
    Assignee: Changzhou ZhongMin Semi-Tech Co., Ltd
    Inventor: Yuzhu Li
  • Publication number: 20160240639
    Abstract: A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer, N-drift layer and N-type CS layer within the N-drift layer near the top side. Multiple trench structures are formed by polysilicon core and gate oxide layer near the front side. There are active cells and plugged cells on top of the device. The polysilicon cores of the trenches in the active cells are connected to the gate electrode, and the polysilicon cores of the trenches in the plugged cells are connected to the emitter electrode. There are N+ region and P+ region in active cells, and they are connected to metal emitter layer through the window in the insulation layer. There are P-well regions in both active cells and plugged cells. The P-well regions in active cells are continuous and connected to emitter electrode through P+ region. The P-well regions in plugged cells are divided by N-drift layer, forming discontinuous P-type regions along the direction of trenches.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 18, 2016
    Inventor: Yuzhu Li
  • Publication number: 20160233105
    Abstract: A method to make a semiconductor device, a first SiO2 layer and a first Si3N4 layer are sequentially formed on the semiconductor substrate. The first SiO2 layer and the first Si3N4 layer are then patterned as etching mask to form a trench in a semiconductor substrate by a trench etching process. After this, a second SiO2 layer and a second Si3N4 layer are formed conformal onto the substrate. Anisotropic etching is then performed to remove the second Si3N4 and second SiO2 layer except on the trench sidewall. Then a thermal oxidation process is done to grow oxide only in trench bottom and at trench top corner. The radius of curvature of trench bottom and trench top corner is increased at the same time by this thermal oxidation process.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 11, 2016
    Inventor: Yuzhu Li
  • Publication number: 20160233324
    Abstract: A semiconductor device includes: metal collector layer on backside, P-type collector layer, N-type field stop layer and N- drift layer. There are active cells and dummy cells on top of the device. The active cell and dummy cell are separated by gate trench. The gate trench is formed by polysilicon and gate oxide layer. There are N+ region and P+ region in active cells, and they are connected to metal emitter layer through the window in the insulation layer. There are P-well regions in both active cells and dummy cells. The P-well regions in active cells are continuous and connected to emitter electrode through P+ region. The P-well regions in dummy cells are discontinuous and electrically floating.
    Type: Application
    Filed: February 4, 2016
    Publication date: August 11, 2016
    Inventor: Yuzhu Li