Patents by Inventor Yuzo Hirayama

Yuzo Hirayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050083400
    Abstract: A three-dimensional image display device includes a display portion having pixels arranged in the form of a matrix in a planar display surface to have fixed horizontal and vertical pitches, a light ray control portion having first optical apertures arranged in front of the display portion to have a first pitch in a horizontal direction which limit light rays in the horizontal direction and second optical apertures to have a second pitch in a vertical direction which converge the light rays at a certain view distance, and a display drive portion which gives element images generated based on parallel projected images to pixel groups along the horizontal direction and gives image segments obtained by interleaving perspective projected images in the vertical direction. Preferably, the first pitch is equal to an integer multiple of the horizontal pitch of the pixels, and the second pitch is smaller than the vertical pitch.
    Type: Application
    Filed: September 3, 2004
    Publication date: April 21, 2005
    Inventors: Yuzo Hirayama, Rieko Fukushima, Tatsuo Saishu, Kazuki Taira
  • Publication number: 20050057807
    Abstract: The embodiment is to make it possible to increase a resolution obtained when a character or a two-dimensional image is displayed. A stereoscopic image display device is provided with a two-dimensional image display device having a plurality of pixels arranged within a display plane; and a ray control section which is provided in front of or behind the display plane and has a plurality of opening portions or a plurality of lenses arranged side by side, for controlling rays from the pixels, a distance z from the ray control section to a two-dimensional character or a two-dimensional image display position satisfying relationships of 0<z<L×D/(1+D)/2 in a projection region and 0<z<L×D/(1?D)/2 in a depth region, wherein L represents a viewing distance, Ip represents a pitch of the opening portions or the lenses, 2? represents a viewing area angle, pp represents the pitch of the pixels, and D is expressed as D = ( l p ) 2 2 ? Lp p ? tan ? ( ? ) .
    Type: Application
    Filed: September 15, 2004
    Publication date: March 17, 2005
    Inventors: Ayako Takagi, Kazuki Taira, Yuzo Hirayama, Rieko Fukushima, Tatsuo Saishu
  • Publication number: 20040252374
    Abstract: In a one-dimensional IP (vertical disparity discarding system), it is made possible to obtain a perspective projection image with no distortion or reduced distortion. A stereoscopic display device is provided with a display device including a display plane in which pixels are arranged flatly in a matrix shape; and a parallax barrier including a plurality of apertures or a plurality of lenses and being configured to control directions of rays from the pixels such that a horizontal disparity is included but a vertical disparity is not included.
    Type: Application
    Filed: March 26, 2004
    Publication date: December 16, 2004
    Inventors: Tatsuo Saishu, Yuzo Hirayama
  • Publication number: 20040222945
    Abstract: A three-dimensional image display apparatus includes an image display configured to output image light which arrays a plurality of pixels and has polarization, a lens array arranged in front of the image display, configured to function as lens at light which has a 1st polarization direction, and not to function as lens at light which has a 2nd polarization direction differed from the 1st polarization direction, and a birefringent phase modulator placed between the image display and the lens array and configured to rotate a polarization plane of the image light.
    Type: Application
    Filed: February 6, 2004
    Publication date: November 11, 2004
    Inventors: Kazuki Taira, Yuzo Hirayama, Tatsuo Saishu, Rieko Fukushima, Ayako Takagi
  • Publication number: 20040150583
    Abstract: An apparatus is provided with a display unit and a optical filter. The unit has pixels arranged in a matrix form, which are groped into a first group and second groups to display two-dimensional image information constituting elemental images, the image information being obtained from different directions. The optical filter has a first optical opening opposed to the first pixel group and second optical openings opposed to corresponding one of the second pixel groups. The center of the first pixel group is coincident with the axis of the first opening, each center of the second pixel groups is deviated from corresponding one of the second opening axe, and the deviation is gradually increased depending on a distance between the first and the second pixel group centers. The light rays are directed to a reference plane from the first and second pixel groups through the first and second opening axes.
    Type: Application
    Filed: December 24, 2003
    Publication date: August 5, 2004
    Inventors: Rieko Fukushima, Yuzo Hirayama, Kazuki Taira
  • Publication number: 20040135739
    Abstract: A plurality of light direction detectors are provided on an image display screen and the position of a light source in the real space is detected so as to give a shadow to a display object within a display image by seasoning three-dimensional image data with these items of information.
    Type: Application
    Filed: July 3, 2003
    Publication date: July 15, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Rieko Fukushima, Kazuki Taira, Yuzo Hirayama
  • Publication number: 20030184571
    Abstract: A three-dimensional image display apparatus comprising a display panel, which displays a parallel projection image corresponding to a three-dimensional image, and an array plate disposed on a front of the display panel and having pinholes arranged two-dimensionally. The display panel includes pixels arranged two-dimensionally in correspondence with the pinholes. Each of the pixels can include a first subpixel, a second subpixel, and a third subpixel. The apparatus also includes a point at which a line passing through one of the pinholes from the first subpixel intersects the three-dimensional image, a point at which a line passing through the one of the pinholes from the second subpixel intersects the three-dimensional image, and a point at which a line passing through the one of the pinholes from the third subpixel intersects the three-dimensional image being separated from one another.
    Type: Application
    Filed: March 13, 2003
    Publication date: October 2, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yuzo Hirayama
  • Patent number: 6586775
    Abstract: A light emitting device which emits visible light through heat radiation of a tungsten filament. Photonic crystal structures in each of which Ag spheres are arranged in a TiO2 film are provided around the filament. Whereas radiation of infrared light from the filament is suppressed, radiation of visible light is enhanced.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: July 1, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuzo Hirayama
  • Publication number: 20030071564
    Abstract: A light emitting device which emits visible light through heat radiation of a tungsten filament. Photonic crystal structures in each of which Ag spheres are arranged in a TiO2 film are provided around the filament. Whereas radiation of infrared light from the filament is suppressed, radiation of visible light is enhanced.
    Type: Application
    Filed: March 20, 2000
    Publication date: April 17, 2003
    Inventor: Yuzo Hirayama
  • Patent number: 6108481
    Abstract: In order to realize an optical semiconductor device having a window structure promising high-speed operation and highly efficient coupling with optical fibers and to realize its manufacturing method, the device has a window structure in which an optical guide layer is partly removed near the emission facet to decrease the facet reflectivity. Since a cladding layer has a narrow mesa structure also in a window region, the parasitic capacitance can be reduced, and high-speed modulation is ensured. Although light runs through the window region in spread directions from one end of the optical guide layer toward the emission facet, the cladding layer changes its width or thickness in accordance with the spread angle of light. Therefore, light is not reflected or scattered by side surfaces of the cladding layer, and prevents a decrease in optical output due to a scattering loss, or a deterioration in distribution of emitted light.
    Type: Grant
    Filed: January 30, 1998
    Date of Patent: August 22, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Tohyama, Masahisa Funemizu, Yuzo Hirayama
  • Patent number: 6043515
    Abstract: An optical semiconductor device has a structure in which a semiconductor active layer is sandwiched by a p-type semiconductor cladding layer and an n-type semiconductor cladding layer and a p-type contact layer is formed on the p-type semiconductor cladding layer side and an n-type contact layer is formed on the n-type semiconductor cladding layer side, wherein two ferromagnetic layers are formed on the n-type contact layer and two ferromagnetic layers are formed on the p-type contact layer. Magnetization directions of a pair of ferromagnetic layers vertically opposed to each other are set to be parallel to each other, and the magnetization directions of adjacent ferromagnetic layers are inverted to each other.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: March 28, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuzo Kamiguchi, Yuzo Hirayama, Masashi Sahashi
  • Patent number: 5970081
    Abstract: A grating coupled surface emitting laser has a diffraction grating of a second or higher order for guided-mode light part of a waveguide region, and extract a beam in a direction perpendicular to the waveguide region. By narrowing a stripe of the waveguide region around the center, the phase of the diffraction grating is shifted to attain a Gaussian distribution for radiation-mode light in a cross section along the waveguiding direction.
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: October 19, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuzo Hirayama, Masahisa Funemizu, Masaki Tohyama, Motoyasu Morinaga, Keiji Takaoka, Kazuhiro Inoue, Makoto Ohashi
  • Patent number: 5901265
    Abstract: This invention provides an optical semiconductor device including a semiconductor substrate having a mesa stripe in which at least an optical waveguide layer is formed, a major surface of the semiconductor substrate being a crystal plane, a semiconductor buried layer formed on the two side surfaces of the mesa stripe, and a stripe cladding layer formed on the mesa stripe region and the semiconductor buried layer and having a shape whose section is substantially trapezoidal and whose side surfaces are crystal planes.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: May 4, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Tohyama, Yuzo Hirayama
  • Patent number: 5889913
    Abstract: This invention provides an optical semiconductor device including a semiconductor substrate having a mesa stripe in which at least an optical waveguide layer is formed, a major surface of the semiconductor substrate being a crystal plane, a semiconductor buried layer formed on the two side surfaces of the mesa stripe, and a stripe cladding layer formed on the mesa stripe region and the semiconductor buried layer and having a shape whose section is substantially trapezoidal and whose side surfaces are crystal planes.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: March 30, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Tohyama, Yuzo Hirayama
  • Patent number: 5754714
    Abstract: A semiconductor optical waveguide device comprises a stripe-shaped semiconductor optical waveguide, part of the semiconductor optical waveguide being an active layer producing gain by electric current injection, and part of the semiconductor optical waveguide being an intra-band resonant absorption layer in which an intra-band absorption resonant wavelength is arranged within the gain band of the active layer, and means for injecting electric current into the active layer.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: May 19, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Suzuki, Yuzo Hirayama
  • Patent number: 5274649
    Abstract: An electronically wavelength-tunable distributed-feedback quantum well semiconductor laser includes a semiconductor substrate, an optical waveguide layer on the substrate, and a multiple quantum well structure section arranged on the optical waveguide layer and including first and second semiconductor layers which are alternately laminated on each other. The multiple quantum well structure section change regionally in the lamination number of the first and second layers, thereby defining a series of active regions with different gain versus carrier characteristics. A plurality of electrodes are formed on the upper portion of the multiple quantum well structure section positionally in association with the series of the activated regions.
    Type: Grant
    Filed: November 21, 1991
    Date of Patent: December 28, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuzo Hirayama, Masaaki Onomura
  • Patent number: 5253264
    Abstract: A semiconductor laser of multiple quantum well structure includes a multiple quantum well active layer having a well layer of In.sub.x Ga.sub.1-x As (0<x .ltoreq.1), a first p-type clad layer which is formed on the active layer and lattice-matches with InP, and a second p-type clad layer having a higher acceptor concentration than the first p-type clad layer. The acceptor concentration of the first p-type clad layer is set to be not more than 2 .times.10.sup.17 cm.sup.-3 and that of the second p-type region is set to be not less than 1.times.10.sup.18 cm.sup..times.3 in the range of 0.25 .mu.m from the active layer. The well layer of the active layer is formed of In.sub.x Ga.sub.1-x As (0.53<x .ltoreq.1). A laser in which the efficiency of injection into the active layer is increased and which has a small threshold value and excellent high-speed characteristic can be provided.
    Type: Grant
    Filed: November 29, 1991
    Date of Patent: October 12, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Suzuki, Yuzo Hirayama, Masaaki Onomura
  • Patent number: 5084410
    Abstract: A semiconductor device which comprises a semiconductor substrate having a surface orientation substantially in a {100}-orientation is provided. On the semiconductor substrate, plural steps formed in a direction deviated substantially from a <110>-direction by 5 degrees or more are formed. The steps, which are mesa and concave portions, are buried by plural semiconductor crystal layers grown by the use of MOCVD or the like. A method of manufacturing such a device is also provided.
    Type: Grant
    Filed: October 14, 1988
    Date of Patent: January 28, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Eguchi, Tetsuo Sadamasa, Hideto Furuyama, Yuzo Hirayama
  • Patent number: 5021361
    Abstract: In a monolithic OEIC in which an FET and a light-emitting device are integrated, the light-emitting device has a first clad layer, an active layer, and a second clad layer stacked on a substrate, the FET has a channel layer and source and drain layers with a high impurity concentration stacked on the substrate, etching mask layers on the source and drain layers, and a gate electrode formed on a channel layer between source and drain electrodes and the source and drain layers, the first clad layer of the light-emitting diode and the source and drain layers with a high impurity concentration of the FET are formed of the same semiconductor layer, and an active layer of the light-emitting device and the etching mask layers of the FET are formed of the same semiconductor layer.
    Type: Grant
    Filed: December 11, 1989
    Date of Patent: June 4, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun'ichi Kinoshita, Nobuo Suzuki, Motoyasu Morinaga, Yuzo Hirayama, Masaru Nakamura
  • Patent number: 4974233
    Abstract: A semiconductor laser device comprises a semiconductor mesa portion formed above semiconductor substrate by a predetermined interval, an active region, formed between the mesa portion and semiconductor substrate and consisting of a semiconductor having a forbidden band width smaller than those of the mesa portion and semiconductor substrate, for contributing to light emission, a pair of buried portions formed at both sides in a widthwise direction of and in contact with the active region and consisting of a semiconductor having a forbidden band width larger than that of the active region, a total width of the buried portions and the active region being smaller than that of the mesa portion, thereby forming a gap at a side of each of the buried portions between the mesa portion and semiconductor substrate to electrically insulate the mesa portion and semiconductor substrate, and supporting portions formed integrally with the mesa portion so as to support the mesa portion with respect to the substrate in associ
    Type: Grant
    Filed: July 21, 1989
    Date of Patent: November 27, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Suzuki, Motoyasu Morinaga, Hideto Furuyama, Yuzo Hirayama, Hajime Okuda, Masaru Nakamura, Nawoto Motegi