Patents by Inventor Yves Devigne

Yves Devigne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7458042
    Abstract: A device for debugging an electronic circuit manufactured from an initial program in hardware description language, HDL, comprising an instrumentation unit capable of receiving the initial program; receiving an additional program describing determined functions; determining an additional circuit to be incorporated into the electronic circuit from the additional program, capable of setting to a determined value a signal selected from among an input signal, an output signal, or a signal internal to the additional circuit; and providing a modified program in HDL language incorporating a description in HDL language of the additional circuit; and a debugging unit capable of debugging a modified electronic circuit manufactured from the modified program, the debugging unit being capable of communicating with the additional circuit to control the setting to the determined value of the selected signal.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: November 25, 2008
    Assignee: Temento Systems
    Inventors: Pierre Colle, Olivier Potin, Anne Wantens, Yves Devigne
  • Publication number: 20060064678
    Abstract: A device for debugging an electronic circuit manufactured from an initial program in hardware description language, HDL, comprising an instrumentation unit capable of receiving the initial program; receiving an additional program describing determined functions; determining an additional circuit to be incorporated into the electronic circuit from the additional program, capable of setting to a determined value a signal selected from among an input signal, an output signal, or a signal internal to the additional circuit; and providing a modified program in HDL language incorporating a description in HDL language of the additional circuit; and a debugging unit capable of debugging a modified electronic circuit manufactured from the modified program, the debugging unit being capable of communicating with the additional circuit to control the setting to the determined value of the selected signal.
    Type: Application
    Filed: July 22, 2005
    Publication date: March 23, 2006
    Inventors: Pierre Colle, Olivier Potin, Anne Wantens, Yves Devigne
  • Patent number: 5111459
    Abstract: An electronic circuit tester according to the invention comprises: a connection board for connection with each of the terminals of the circuit to be tested; n boards (16), called electronic pins, comprising signal shaping means each of which is connected to an input of the connection board; a single test vector memory unit (17) containing all the test vectors for the circuit and from the circuit, those vectors transiting through said electronic pins; a central processing unit (10) for managing the system and the external links; in which the management of the vector memory is made alternatively by a memory management unit (22 ) connected independently from the other tester units to the central processing unit (10) or by an address processor (23) asynchronously operating with respect to the central processing unit.
    Type: Grant
    Filed: September 17, 1987
    Date of Patent: May 5, 1992
    Assignee: DRAXY (s.a.r.l.)
    Inventor: Yves DeVigne