Patents by Inventor Yves DuFour
Yves DuFour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8558891Abstract: A method for detecting an object in a scene situated in a sector and capable of comprising one or more artifacts, includes_a step of scanning the sector at an angular velocity ??, a step of acquiring digital images of the scene at a rate f by means of a matrix detector, these images comprising pixels and covering an instantaneous field of angular width “a”.Type: GrantFiled: June 5, 2009Date of Patent: October 15, 2013Assignee: ThalesInventors: Jean-Yves Dufour, Michel Prenat, Nadège Lemperiere
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Publication number: 20120032703Abstract: A shrinking-pulse digital delay line (400) has a cascade of a plurality of stages (102,104) for modifying a width of a pulse propagating down the cascade (106 to 118). Each specific one of the stages has an input (106,116), an output (108,118) and a main path (110,112,120,122) between the input and the output. The main path has a first inverter (110,120) and a second inverter (112,122) connected in series via an intermediate node (114,124). Each specific stage has a third inverter (128,140) connected between the input and the intermediate node of a downstream stage in the cascade (102,104); and also has a fourth inverter (132,144) connected between the intermediate node of the specific stage (mode 114, stage 102, mode 124, stage 104) and the output (118, stage 104) of the downstream stage (stage 104).Type: ApplicationFiled: February 16, 2010Publication date: February 9, 2012Applicant: NXP B.V.Inventors: Denis Crespo, Yves Dufour, Herve Marie
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Publication number: 20110080480Abstract: A method for detecting an object in a scene situated in a sector and capable of comprising one or more artifacts, includes_a step of scanning the sector at an angular velocity ??, a step of acquiring digital images of the scene at a rate f by means of a matrix detector, these images comprising pixels and covering an instantaneous field of angular width “a”.Type: ApplicationFiled: June 5, 2009Publication date: April 7, 2011Applicant: THALESInventors: Jean-Yves Dufour, Michel Prenat, Nadège Lemperiere
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Publication number: 20110001823Abstract: The invention relates to a method for detecting a target in a scene comprising: a step of acquiring digital images of the scene by means of a sensor, these images comprising pixels, then, for each pixel: —a step of estimating the background of the pixel, —a step of estimating the signal-to-noise ratio of the pixel, —a decision step by thresholding this signal-to-noise ratio to determine whether the pixel is a pixel of the target. The step of estimating the background of the pixel is based on the selection, for each pixel, of a so-called neighboring area, centered around the pixel, this area satisfying a predetermined uniformity criterion and the size of this area being as close as possible to a predetermined maximum size.Type: ApplicationFiled: October 24, 2008Publication date: January 6, 2011Applicant: THALESInventors: Jean-Yves Dufour, Michel Prenat, Nadege Lemperiere
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Patent number: 6686806Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.Type: GrantFiled: December 14, 2000Date of Patent: February 3, 2004Assignee: Tropian, Inc.Inventor: Yves Dufour
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Patent number: 6512422Abstract: The present invention provides an oscillator such as a voltage controlled oscillator (VCO) that can supply more stable frequency signals in the presence of strong magnetic coupling caused by external magnetic perturbations. According to one embodiment of the invention, an oscillator is presented and comprises an amplifier and an LC circuit connected to the amplifier. In the LC circuit, a first pair of inductors includes first and second inductors and a second pair of inductors includes third and fourth inductors. The first and second pairs are arranged such that the first and fourth inductors are on a first side and the second and third inductors are on a second side. In one arrangement, the inductors are positioned such that a center between the first and second inductors substantially overlap a center between the third and fourth inductors.Type: GrantFiled: March 30, 2001Date of Patent: January 28, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Yves Dufour, Steffen W Hahn
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Patent number: 6496035Abstract: An integrated circuit includes a serpentine conductor track extending through a plurality of conductor layers and having ends coupled to first and second circuit elements, the ends being in opposing outermost ones of the conductor layers. The serpentine conductor track can selectively be made to be (i) continuous and electrically couple the first and second circuit elements together or (ii) discontinuous so that the first and second conductor elements are not electrically coupled. In the latter case, the discontinuity can be formed in any one of the conductor layers and a bridging conductor track is further formed in that one conductor layer which is coupled to the serpentine conductor track and which bypasses either of the first and second circuit elements. This structure has the advantage that circuit changes can be made in any conductor layer.Type: GrantFiled: April 6, 2001Date of Patent: December 17, 2002Assignee: Koninklijke Philips Electronics N.V.Inventors: Rune Hartung Jensen, Yves Dufour
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Publication number: 20020140516Abstract: The present invention provides an oscillator such as a voltage controlled oscillator (VCO) that can supply more stable frequency signals in the presence of strong magnetic coupling caused by external magnetic perturbations. According to one embodiment of the invention, an oscillator is presented and comprises an amplifier and an LC circuit connected to the amplifier. In the LC circuit, a first pair of inductors includes first and second inductors and a second pair of inductors includes third and fourth inductors. The first and second pairs are arranged such that the first and fourth inductors are on a first side and the second and third inductors are on a second side. In one arrangement, the inductors are positioned such that a center between the first and second inductors substantially overlap a center between the third and fourth inductors.Type: ApplicationFiled: March 30, 2001Publication date: October 3, 2002Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.Inventors: Yves Dufour, Steffen W. Hahn
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Publication number: 20020113657Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.Type: ApplicationFiled: December 14, 2000Publication date: August 22, 2002Inventor: Yves Dufour
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Patent number: 6426650Abstract: A method of manufacturing an integrated circuit having metal programmable logic cells. Metal programmable logic cells include transistors which, by varying routing of conductors in the metalization of the integrated circuit, may be connected in or disconnected from a logic path extending between the input and output of the cell. Transistors which are deselected by not being connected in the logic path are also decoupled from the supply rails. Generally speaking, deselected transistors can not be scan tested without substantial additional circuitry, as they do not form part of the logic path between the cell input and output to which the scan test circuitry is normally coupled. Decoupling transistors which are not in the logic path ensures that “stuck on” faults, in which transistors are stuck in a conductive state, do not allow current to flow between the supply rails through these faulty transistors, thus avoiding hot spots and reliability problems.Type: GrantFiled: December 28, 1999Date of Patent: July 30, 2002Assignee: Koninklijke Philips Electronics, N.V.Inventors: Yves Dufour, Rune Hartung Jensen
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Patent number: 6292024Abstract: An integrated circuit includes a serpentine conductor track extending through a plurality of conductor layers and having ends coupled to first and second circuit elements, the ends being in opposing outermost ones of the conductor layers. The serpentine conductor track can selectively be made to be (i) continuous and electrically couple the first and second circuit elements together or (ii) discontinuous so that the first and second conductor elements are not electrically coupled. In the latter case, the discontinuity can be formed in any one of the conductor layers and a bridging conductor track is further formed in that one conductor layer which is coupled to the serpentine conductor track and which bypasses either of the first and second circuit elements. This structure has the advantage that circuit changes can be made in any conductor layer.Type: GrantFiled: December 14, 1999Date of Patent: September 18, 2001Assignee: Philips Electronics North America CorporationInventors: Rune Hartung Jensen, Yves Dufour
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Publication number: 20010011909Abstract: An integrated circuit includes a serpentine conductor track extending through a plurality of conductor layers and having ends coupled to first and second circuit elements, the ends being in opposing outermost ones of the conductor layers. The serpentine conductor track can selectively be made to be (i) continuous and electrically couple the first and second circuit elements together or (ii) discontinuous so that the first and second conductor elements are not electrically coupled. In the latter case, the discontinuity can be formed in any one of the conductor layers and a bridging conductor track is further formed in that one conductor layer which is coupled to the serpentine conductor track and which bypasses either of the first and second circuit elements. This structure has the advantage that circuit changes can be made in any conductor layer.Type: ApplicationFiled: April 6, 2001Publication date: August 9, 2001Applicant: U.S Philips North America CorporationInventors: Rune Hartung Jensen, Yves Dufour
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Patent number: 6229864Abstract: A lock condition detector for determining whether two signals are within a specified lock condition includes a phase detector which determines whether the first and second signals are within a prescribed phase condition and a frequency detector which determines whether the two signals are within a prescribed frequency relationship. An analyzer outputs a lock condition signal indicative of the first and second signals being out of lock whenever the phase condition signal indicates that the two signals are outside of the phase condition and whenever the frequency condition signal indicates that the two signals are outside of the prescribed frequency condition. The combination of the phase detector and the frequency detector prevents an erroneous in-lock condition signal when the two signals are in phase but at multiple frequencies of each other, as well as eliminates a high frequency data stream when there is a large frequency error between the two signals which would occur if only a phase detector were used.Type: GrantFiled: December 18, 1997Date of Patent: May 8, 2001Assignee: Philips Electronics North America CorporationInventor: Yves DuFour
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Patent number: 6130561Abstract: Compensating for phase nonalignment between VCO frequency divider and referenced frequency signal in a fractional-N PLL is provided by compensation implemented by a variable charge pump system. Phase comparator logic is configured to turn ON some of the charge pumps of the charge pump system early and the rest of the charge pumps later. This process effects an equivalent charge being turned ON at the exact point in time for properly compensating for the fractional charge.Type: GrantFiled: December 28, 1998Date of Patent: October 10, 2000Assignee: Philips Electronics North America CorporationInventor: Yves Dufour
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Patent number: 6111470Abstract: The switching time of a phase-locked loop (PLL) circuit can be reduced by increasing circuit bandwidth. A charge pump system is commonly used in the PLL circuitry to drive the voltage control oscillator (VCO). The increase in bandwidth intensifies the noise that is contributed by the charge pump system. To reduce charge pump noise, a chopper stabilizer circuit modulates the noise to a sufficiently high frequency so that a low-pass filter may filter out the modulated noise.Type: GrantFiled: October 9, 1998Date of Patent: August 29, 2000Assignee: Philips Electronics North America CorporationInventor: Yves Dufour
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Patent number: 5717347Abstract: The invention relates to a logic circuit of the emitter-coupled type. For operation with a low supply Voltage, for example a single battery element, the bases of the transistors (Q1, Q2) forming a differential pair receive the input signal (Vi, Vi) via a coupling capacitance (C1, C2), a low-frequency bias being provided by means of MOS transistors (M1, M2) driven by input signals opposed to those applied to the corresponding bases, said MOS transistors being coupled to a line (3) at a voltage (vb) higher than the supply voltage (V1) supplied by a generator (10) provided for this function.Type: GrantFiled: April 12, 1996Date of Patent: February 10, 1998Assignee: U.S. Philips CorporationInventor: Yves Dufour
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Patent number: 5590163Abstract: Frequency divider circuit, frequency synthesizer comprising such a divider and radio telephone comprising such a synthesizer. A frequency divider circuit according to the invention includes a succession of N divide-by-two or divide-by-three dividing cells for an input frequency signal, while specific ones of these cells can be disabled to obtain division factors smaller than 2.sup.N.Type: GrantFiled: May 2, 1995Date of Patent: December 31, 1996Assignee: U.S. Philips CorporationInventor: Yves Dufour
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Patent number: 5465061Abstract: A low noise charge-pump circuit with low power consumption and operating in a cyclic mode comprises two current sources connected in parallel, and a current mirror for transforming the current supplied by one of the current sources and coupling it to the output of the other current source. Each of the current sources essentially comprises a transistor controlled from the output (VB) of a reference voltage generator via a respective transistor switch. The reference voltage generator essentially comprises a third transistor similar to the two first-mentioned transistors and in series with a further current source supplying a current Io, and means for making the current through the third transistor equal to the current Io.Type: GrantFiled: February 25, 1994Date of Patent: November 7, 1995Assignee: U.S. Philips CorporationInventor: Yves Dufour
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Patent number: 5363065Abstract: Frequency synthesizer employing a current mirror circuit having a control branch which includes a transistor (T1) which is supplied by a control current source (S) operating in the switch mode. An improved decay time of the current mirror circuit is obtained by providing an additional transistor (TA) in parallel with the transistor (T1), having a fixed base bias voltage such that transistor (TA) is practically cut off when the control current source (S) supplies a nominal current and starts conducting when the control current is switched off. If the additional transistor (TA) is bipolar it is provided with an anti-saturation device, for example, a Schottky diode (18). It may, however, be a field effect transistor.Type: GrantFiled: March 4, 1993Date of Patent: November 8, 1994Assignee: U.S. Philips CorporationInventor: Yves Dufour
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Patent number: 5233670Abstract: Apparatus and method to localize rectilinear contours in a digitized image for recognizing shapes at a scene. The gradient of the gray level function of the image at the position of each pixel is determined, and those pixels which constitute a contour pixel are identified. The identified contour pixels are complemented with filler pixels where discontinuities are found. The neighborhood of pixels about a contour pixel is compared with a series of characteristic pixel configurations to determine if a correspondence exists with the characteristic configurations. In this way, rectilinear contour pixels are identified.Type: GrantFiled: July 22, 1991Date of Patent: August 3, 1993Assignee: Thomson TRT DefenseInventors: Jean-Yves Dufour, Serge Le Gall, Hugues Waldburger