Publication number: 20110087808
Abstract: This direct access memory controller (10, 20) is programmed to transfer data from several data sources (121, . . . , 12i, . . . , 12n) to at least one addressee (14) for these data, through several buffer memories (161, . . . , 16i, . . . , 16n). It comprises a read management module (30) designed to read data stored in the buffer memories (161, . . . , 16i, . . . , 16n) and to transfer them in sequence to the addressee (14) and read pointers (PL1, PL2) storage means (38) associated respectively with each buffer memory respectively. For each buffer memory (161, . . . , 16i, . . . , 16n), the controller (10, 20) comprises means of executing a firmware (401, . . . , 40i, . . . , 40n) to read data and update the read pointer associated with this buffer memory, and it comprises means (30, 401, . . . , 40i, . . . , 40n) of synchronising execution of the firmwares as a function of a predetermined order of data originating from buffer memories required in the data sequence to be transferred to the addressee.
Type:
Application
Filed:
September 24, 2010
Publication date:
April 14, 2011
Applicant:
COMMISSAR. A L'ENERG. ATOM. ET AUX ENERG. ALTERN.
Inventors:
Yves DURAND, Christian Bernard