Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to high electron mobility transistor (HEMT) devices having a silicided polysilicon layer. The present disclosure may provide an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region, the gate being laterally between the source and drain electrodes, a polysilicon layer above the substrate, and a silicide layer on the polysilicon layer. The active region includes at least two material layers with different band gaps. The polysilicon layer may be configured as an electronic fuse, a resistor, or a diode.

Abstract: Body-contacted semiconductor structures and methods of forming a body-contacted semiconductor structure. A semiconductor substrate, which contains of a single-crystal semiconductor material, includes a device region and a plurality of body contact regions each comprised of the single-crystal semiconductor material. A polycrystalline layer and polycrystalline regions are formed in the semiconductor substrate. The polycrystalline regions are positioned between the polycrystalline layer and the device region, and the polycrystalline regions have a laterally-spaced arrangement with a gap between each adjacent pair of the polycrystalline regions. One of the plurality of body contact regions is arranged in the gap between each adjacent pair of the polycrystalline regions.

Abstract: Body-contacted semiconductor structures and methods of forming a body-contacted semiconductor structure. A semiconductor substrate, which contains of a single-crystal semiconductor material, includes a device region and a plurality of body contact regions each comprised of the single-crystal semiconductor material. A polycrystalline layer and polycrystalline regions are formed in the semiconductor substrate. The polycrystalline regions are positioned between the polycrystalline layer and the device region, and the polycrystalline regions have a laterally-spaced arrangement with a gap between each adjacent pair of the polycrystalline regions. One of the plurality of body contact regions is arranged in the gap between each adjacent pair of the polycrystalline regions.

Abstract: Structures for integrated lasers, systems including integrated lasers, and associated fabrication methods. A ring waveguide and a seed region are arranged interior of the ring waveguide. A laser strip extends across a portion of the ring waveguide. The laser strip has an end contacting the seed region and another opposing end. The laser strip includes a laser medium and a p-n junction capable of generating electromagnetic radiation. The p-n junction of the laser strip is aligned with a portion of the ring waveguide.

Abstract: Structures for integrated lasers, systems including integrated lasers, and associated fabrication methods. A ring waveguide and a seed region are arranged interior of the ring waveguide. A laser strip extends across a portion of the ring waveguide. The laser strip has an end contacting the seed region and another opposing end. The laser strip includes a laser medium and a p-n junction capable of generating electromagnetic radiation. The p-n junction of the laser strip is aligned with a portion of the ring waveguide.

Abstract: A thin, rechargeable, flexible electrochemical energy cell includes a battery cell, or a capacitor cell, or a battery/capacitor hybrid cell that can be stackable in any number and order. The cell can be based on a powdery mixture of hydrated ruthenium oxide particles or nanoparticles with activated carbon particles or nanoparticles suspended in an electrolyte. The electrolyte may contain ethylene glycol, boric acid, citric acid, ammonium hydroxide, organic acids, phosphoric acid, and/or sulphuric acid. An anode electrode may be formed with a thin layer of oxidizable metal (Zn, Al, or Pb). The cathode may be formed with a graphite backing foil. The energy cell may have a voltage at or below 1.25V for recharging. The thickness 15 of the cell structure can be in the range of 0.5 mm-1 mm, or lower.

Abstract: A stepper system for ultra-high resolution nano-lithography employs a photolithographic mask which includes a layer of an electrically conductive optically opaque material in which periodic arrays of sub-wavelength apertures are formed. The plasmonic excitation in the photolithographic mask exposed to the light of the wavelength in the range of 197 nm-248 nm, produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer. The stepper system demonstrates the resiliency to the mask defects and ability to imprint coherent clear features of nano dimensions (45 nm-500 nm) and various shapes on the wafers for integrated circuits design. The stepper system may be adjusted to image the plane of the highest plasmonic field exiting the mask.

Abstract: A nanophotolithography mask includes a layer of an electrically conductive optically opaque material deposited on a mask substrate in which regular arrays of sub-wavelength apertures are formed. The plasmonic excitation in the layer perforated with the sub-wavelength apertures arrays under the light incident on the mask produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer when propagated to the same. The fill-factor of the mask, i.e., the ratio of the total apertures area to the total mask area, may lead to a significant increase in mask manufacturing throughput by FIB or electron beam “writing”. The mask demonstrates the defect resiliency and ability to imprint coherent clear features of nano dimensions and shapes on the wafers for integrated circuits design.

Abstract: Provided is an RF power harvesting circuit with improved sensitivity to RF energy. The RF power harvesting device includes an inductor, a first capacitor connected to the inductor, a first MOSFET connected to a first node, and a second MOSFET connected to the first node. The inductor or the first capacitor are connected to the first node.

Abstract: A thin, rechargeable, flexible electrochemical energy cell includes a battery cell, or a capacitor cell, or a battery/capacitor hybrid cell that can be stackable in any number and order. The cell can be based on a powdery mixture of hydrated ruthenium oxide particles or nanoparticles with activated carbon particles or nanoparticles suspended in an electrolyte. The electrolyte may contain ethylene glycol, boric acid, citric acid, ammonium hydroxide, organic acids, phosphoric acid, and/or sulphuric acid. An anode electrode may be formed with a thin layer of oxidizable metal (Zn, Al, or Pb). The cathode may be formed with a graphite backing foil. The materials used in the energy cell can be explosive-free, nonflammable, nontoxic, and environmentally safe, and the energy cell may have a voltage at or below 1.25V for recharging. The thickness of the cell structure can be in the range of 0.5 mm-1 mm, or lower.

Abstract: A stepper system for ultra-high resolution nano-lithography employs a photolithographic mask which includes a layer of an electrically conductive optically opaque material in which periodic arrays of sub-wavelength apertures are formed. The plasmonic excitation in the photolithographic mask exposed to the light of the wavelength in the range of 197 nm-248 nm, produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer. The stepper system demonstrates the resiliency to the mask defects and ability to imprint coherent clear features of nano dimensions (45 nm-500 nm) and various shapes on the wafers for integrated circuits design. The stepper system may be adjusted to image the plane of the highest plasmonic field exiting the mask.

Abstract: A nanophotolithography mask includes a layer of an electrically conductive optically opaque material deposited on a mask substrate in which regular arrays of sub-wavelength apertures are formed. The plasmonic excitation in the layer perforated with the sub-wavelength apertures arrays under the light incident on the mask produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer when propagated to the same. The fill-factor of the mask, i.e., the ratio of the total apertures area to the total mask area, may lead to a significant increase in mask manufacturing throughput by FIB or electron beam “writing”. The mask demonstrates the defect resiliency and ability to imprint coherent clear features of nano dimensions and shapes on the wafers for integrated circuits design.