Abstract: A transceiver includes a receiver section and a transmitter section. The receiver section includes a clocking circuit, a serial-to-parallel module, and compensation. The transmitter section includes a clocking circuit, parallel-to-serial module, and compensation. The compensation within the receiver section and transmitter section compensates for integrated circuit (IC) processing limits and/or integrated circuit (IC) fabrication limits within the clocking circuits, serial-to-parallel module, and parallel-to-serial module that would otherwise limit the speed at which the transceiver could transport data.

Abstract: A current source calibration circuit and methodology reduce noise generated by current switching. In one embodiment, the calibration circuit provides a random or pseudo-random clock signal to control a switching of calibration circuit. A clock signal generator has been described that provide a number of clock signals having different phases. In one embodiment, the clock signals are used to select a current source of a DAC for calibration. By using a random clock to select the current source, noise, which is generated by switching a primary current source with a backup current source, is spread out over a wider frequency range.

Abstract: A segmented digital-to-analog converter (DAC) has been described that uses a two-step calibration process to calibrate current sources to a single primary reference source. In one embodiment, the DAC includes sub-DACs, a reference generator circuit and a primary, or golden, reference source. Current sources of both the sub-DACs and the reference generator are calibrated to a golden current source or primary reference current. In one embodiment, the current sources each include a transistor coupled so that a gate voltage can be adjusted during calibration. The multiple current sources of the reference generator are first calibrated to the primary reference source. The calibrated output currents of the reference generator are then used to calibrate current sources in the sub-DACs.